1 using System;
2 using System.Collections;
3
4 namespace cmsx.machine
5 {
6 public class Formatter
7 {
8 public nothrow Formatter() : targetAddrReg(-1), targetAddress(cast<ulong>(-1))
9 {
10 }
11 public virtual default ~Formatter();
12 public virtual string FormatRegisterNumber(byte x)
13 {
14 return "$" + ToString(x);
15 }
16 public virtual string GetLabel(ulong address)
17 {
18 return string();
19 }
20 public virtual string FormatTrap(byte y)
21 {
22 return ToString(y);
23 }
24 public virtual string GetTags(ulong address)
25 {
26 return string();
27 }
28 public virtual string FormatShortOffset(ulong address, byte y, byte z, bool forward)
29 {
30 ulong to = address;
31 ulong offset = (cast<ulong>(y) << 8u) | cast<ulong>(z);
32 if (forward)
33 {
34 to = to + (offset << 2u);
35 }
36 else
37 {
38 to = to - (offset << 2u);
39 }
40 string label = GetLabel(to);
41 if (label.IsEmpty())
42 {
43 return "#" + ToHexString(y) + ToHexString(z);
44 }
45 else
46 {
47 return label;
48 }
49 }
50 public virtual string FormatLongOffset(ulong address, byte x, byte y, byte z, bool forward)
51 {
52 ulong to = address;
53 ulong offset = (cast<ulong>(x) << 16u) | (cast<ulong>(y) << 8u) | cast<ulong>(z);
54 if (forward)
55 {
56 to = to + (offset << 2u);
57 }
58 else
59 {
60 to = to - (offset << 2u);
61 }
62 string label = GetLabel(to);
63 if (label.IsEmpty())
64 {
65 return "#" + ToHexString(x) + ToHexString(y) + ToHexString(z);
66 }
67 else
68 {
69 return label;
70 }
71 }
72 public virtual string FormatYZWyde(byte y, byte z)
73 {
74 return "#" + ToHexString(y) + ToHexString(z);
75 }
76 public void SaveTargetAddress(byte opCode, byte x, byte y, byte z)
77 {
78 switch (opCode)
79 {
80 case SETH:
81 {
82 targetAddrReg = x;
83 targetAddress = (cast<ulong>(y) << 8u) | cast<ulong>(z);
84 break;
85 }
86 case ORMH: case ORML: case ORL:
87 {
88 if (targetAddress != cast<ulong>(-1) && x == targetAddrReg)
89 {
90 targetAddress = (targetAddress << 16u) | (cast<ulong>(y) << 8u) | cast<ulong>(z);
91 }
92 else
93 {
94 targetAddrReg = -1;
95 targetAddress = cast<ulong>(-1);
96 }
97 break;
98 }
99 default:
100 {
101 targetAddrReg = -1;
102 targetAddress = cast<ulong>(-1);
103 break;
104 }
105 }
106 }
107 public ulong GetTargetAddress(byte y) const
108 {
109 if (targetAddrReg == y)
110 {
111 return targetAddress;
112 }
113 else
114 {
115 return cast<ulong>(-1);
116 }
117 }
118 private int targetAddrReg;
119 private ulong targetAddress;
120 }
121
122 public class Instruction
123 {
124 public nothrow Instruction(byte opCode_) : opCode(opCode_)
125 {
126 }
127 public virtual default ~Instruction();
128 public virtual void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
129 {
130 Panic("instruction " + GetOpCodeName(opCode) + " not implemented");
131 }
132 public virtual string FormatParams(ulong address, byte x, byte y, byte z, Formatter& formatter)
133 {
134 string result;
135 result.Append(formatter.FormatRegisterNumber(x));
136 result.Append(',');
137 if (IsJumpInst() && !IsGoInst())
138 {
139 result.Append(formatter.FormatShortOffset(address, y, z, IsForwardInst()));
140 }
141 else if (IsWydeImmediateInst())
142 {
143 result.Append(formatter.FormatYZWyde(y, z));
144 }
145 else
146 {
147 if (IsNegateInstruction())
148 {
149 result.Append(ToString(y));
150 }
151 else
152 {
153 result.Append(formatter.FormatRegisterNumber(y));
154 }
155 result.Append(',');
156 if (IsZReg())
157 {
158 result.Append(formatter.FormatRegisterNumber(z));
159 }
160 else
161 {
162 result.Append(ToString(z));
163 }
164 }
165 return result;
166 }
167 public virtual string Format(ulong address, byte x, byte y, byte z, Formatter& formatter)
168 {
169 string result = "#" + ToHexString(address);
170 result.Append(' ');
171 result.Append(ToHexString(opCode));
172 result.Append(' ');
173 result.Append(ToHexString(x));
174 result.Append(' ');
175 result.Append(ToHexString(y));
176 result.Append(' ');
177 result.Append(ToHexString(z));
178 result.Append(' ');
179 string tags = formatter.GetTags(address);
180 result.Append(tags);
181 string label = formatter.GetLabel(address);
182 result.Append(Format(label, 80, FormatWidth.min));
183 result.Append(' ');
184 int n = OpCodeMap.Instance().MaxOpCodeNameLength();
185 result.Append(Format(OpCodeMap.Instance().GetName(opCode), n));
186 result.Append(' ');
187 result.Append(FormatParams(address, x, y, z, formatter));
188 if (IsAbsoluteAddressInst())
189 {
190 ulong targetAddress = formatter.GetTargetAddress(y);
191 if (targetAddress != cast<ulong>(-1))
192 {
193 string targetLabel = formatter.GetLabel(targetAddress);
194 if (!targetLabel.IsEmpty())
195 {
196 result.Append(':').Append(targetLabel);
197 }
198 }
199 }
200 formatter.SaveTargetAddress(opCode, x, y, z);
201 return result;
202 }
203 public virtual nothrow bool IsJumpInst() const
204 {
205 return false;
206 }
207 public virtual nothrow bool IsGoInst() const
208 {
209 return false;
210 }
211 public virtual nothrow bool IsForwardInst() const
212 {
213 return true;
214 }
215 public virtual nothrow bool IsZReg() const
216 {
217 return true;
218 }
219 public virtual nothrow bool IsWydeImmediateInst() const
220 {
221 return false;
222 }
223 public virtual nothrow bool IsAbsoluteAddressInst() const
224 {
225 return false;
226 }
227 public virtual nothrow bool IsNegateInstruction() const
228 {
229 return false;
230 }
231 public virtual nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
232 {
233 return List<ulong>(1, pc + 4u);
234 }
235 public byte opCode;
236 }
237
238 public class Trap : Instruction
239 {
240 public nothrow Trap() : base(TRAP)
241 {
242 }
243 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
244 {
245 ulong trap = (cast<ulong>(x) << 16u) | (cast<ulong>(y) << 8u) | cast<ulong>(z);
246 regs.SetSpecial(Registers.rX, trap);
247 regs.SetInterrupt(SOFTWARE_INTERRUPT_BIT);
248 }
249 public override string FormatParams(ulong address, byte x, byte y, byte z, Formatter& formatter)
250 {
251 string result = ToString(x);
252 result.Append(',');
253 result.Append(formatter.FormatTrap(y));
254 result.Append(',');
255 result.Append(ToString(z));
256 return result;
257 }
258 }
259
260 public class Swym : Instruction
261 {
262 public nothrow Swym() : base(SWYM)
263 {
264 }
265 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
266 {
267 }
268 public override string FormatParams(ulong address, byte x, byte y, byte z, Formatter& formatter)
269 {
270 return string();
271 }
272 }
273
274 public class Ldb : Instruction
275 {
276 public nothrow Ldb() : base(LDB)
277 {
278 }
279 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
280 {
281 ulong yy = regs.Get(y);
282 ulong zz = regs.Get(z);
283 ulong a = yy + zz;
284 byte b = mem.ReadByte(a, Protection.read);
285 ulong xx = cmsx.util.SignExtend(b);
286 regs.Set(x, xx);
287 }
288 public override nothrow bool IsAbsoluteAddressInst() const
289 {
290 return true;
291 }
292 }
293
294 public class Ldbi : Instruction
295 {
296 public nothrow Ldbi() : base(LDBI)
297 {
298 }
299 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
300 {
301 ulong yy = regs.Get(y);
302 ulong zz = z;
303 ulong a = yy + zz;
304 byte b = mem.ReadByte(a, Protection.read);
305 ulong xx = cmsx.util.SignExtend(b);
306 regs.Set(x, xx);
307 }
308 public override nothrow bool IsZReg() const
309 {
310 return false;
311 }
312 public override nothrow bool IsAbsoluteAddressInst() const
313 {
314 return true;
315 }
316 }
317
318 public class Ldw : Instruction
319 {
320 public nothrow Ldw() : base(LDW)
321 {
322 }
323 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
324 {
325 ulong yy = regs.Get(y);
326 ulong zz = regs.Get(z);
327 ulong a = yy + zz;
328 ushort w = mem.ReadUShort(a, Protection.read);
329 ulong xx = cmsx.util.SignExtend(w);
330 regs.Set(x, xx);
331 }
332 public override nothrow bool IsAbsoluteAddressInst() const
333 {
334 return true;
335 }
336 }
337
338 public class Ldwi : Instruction
339 {
340 public nothrow Ldwi() : base(LDWI)
341 {
342 }
343 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
344 {
345 ulong yy = regs.Get(y);
346 ulong zz = z;
347 ulong a = yy + zz;
348 ushort w = mem.ReadUShort(a, Protection.read);
349 ulong xx = cmsx.util.SignExtend(w);
350 regs.Set(x, xx);
351 }
352 public override nothrow bool IsZReg() const
353 {
354 return false;
355 }
356 public override nothrow bool IsAbsoluteAddressInst() const
357 {
358 return true;
359 }
360 }
361
362 public class Ldt : Instruction
363 {
364 public nothrow Ldt() : base(LDT)
365 {
366 }
367 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
368 {
369 ulong yy = regs.Get(y);
370 ulong zz = regs.Get(z);
371 ulong a = yy + zz;
372 uint u = mem.ReadUInt(a, Protection.read);
373 ulong xx = cmsx.util.SignExtend(u);
374 regs.Set(x, xx);
375 }
376 public override nothrow bool IsAbsoluteAddressInst() const
377 {
378 return true;
379 }
380 }
381
382 public class Ldti : Instruction
383 {
384 public nothrow Ldti() : base(LDTI)
385 {
386 }
387 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
388 {
389 ulong yy = regs.Get(y);
390 ulong zz = z;
391 ulong a = yy + zz;
392 uint u = mem.ReadUInt(a, Protection.read);
393 ulong xx = cmsx.util.SignExtend(u);
394 regs.Set(x, xx);
395 }
396 public override nothrow bool IsZReg() const
397 {
398 return false;
399 }
400 public override nothrow bool IsAbsoluteAddressInst() const
401 {
402 return true;
403 }
404 }
405
406 public class Ldo : Instruction
407 {
408 public nothrow Ldo() : base(LDO)
409 {
410 }
411 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
412 {
413 ulong yy = regs.Get(y);
414 ulong zz = regs.Get(z);
415 ulong a = yy + zz;
416 ulong xx = mem.ReadULong(a, Protection.read);
417 regs.Set(x, xx);
418 }
419 public override nothrow bool IsAbsoluteAddressInst() const
420 {
421 return true;
422 }
423 }
424
425 public class Ldoi : Instruction
426 {
427 public nothrow Ldoi() : base(LDOI)
428 {
429 }
430 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
431 {
432 ulong yy = regs.Get(y);
433 ulong zz = z;
434 ulong a = yy + zz;
435 ulong xx = mem.ReadULong(a, Protection.read);
436 regs.Set(x, xx);
437 }
438 public override nothrow bool IsZReg() const
439 {
440 return false;
441 }
442 public override nothrow bool IsAbsoluteAddressInst() const
443 {
444 return true;
445 }
446 }
447
448 public class Ldbu : Instruction
449 {
450 public nothrow Ldbu() : base(LDBU)
451 {
452 }
453 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
454 {
455 ulong yy = regs.Get(y);
456 ulong zz = regs.Get(z);
457 ulong a = yy + zz;
458 byte b = mem.ReadByte(a, Protection.read);
459 ulong xx = b;
460 regs.Set(x, xx);
461 }
462 public override nothrow bool IsAbsoluteAddressInst() const
463 {
464 return true;
465 }
466 }
467
468 public class Ldbui : Instruction
469 {
470 public nothrow Ldbui() : base(LDBUI)
471 {
472 }
473 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
474 {
475 ulong yy = regs.Get(y);
476 ulong zz = z;
477 ulong a = yy + zz;
478 byte b = mem.ReadByte(a, Protection.read);
479 ulong xx = b;
480 regs.Set(x, xx);
481 }
482 public override nothrow bool IsZReg() const
483 {
484 return false;
485 }
486 public override nothrow bool IsAbsoluteAddressInst() const
487 {
488 return true;
489 }
490 }
491
492 public class Ldwu : Instruction
493 {
494 public nothrow Ldwu() : base(LDWU)
495 {
496 }
497 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
498 {
499 ulong yy = regs.Get(y);
500 ulong zz = regs.Get(z);
501 ulong a = yy + zz;
502 ushort w = mem.ReadUShort(a, Protection.read);
503 ulong xx = w;
504 regs.Set(x, xx);
505 }
506 public override nothrow bool IsAbsoluteAddressInst() const
507 {
508 return true;
509 }
510 }
511
512 public class Ldwui : Instruction
513 {
514 public nothrow Ldwui() : base(LDWUI)
515 {
516 }
517 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
518 {
519 ulong yy = regs.Get(y);
520 ulong zz = z;
521 ulong a = yy + zz;
522 ushort w = mem.ReadUShort(a, Protection.read);
523 ulong xx = w;
524 regs.Set(x, xx);
525 }
526 public override nothrow bool IsZReg() const
527 {
528 return false;
529 }
530 public override nothrow bool IsAbsoluteAddressInst() const
531 {
532 return true;
533 }
534 }
535
536 public class Ldtu : Instruction
537 {
538 public nothrow Ldtu() : base(LDTU)
539 {
540 }
541 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
542 {
543 ulong yy = regs.Get(y);
544 ulong zz = regs.Get(z);
545 ulong a = yy + zz;
546 uint u = mem.ReadUInt(a, Protection.read);
547 ulong xx = u;
548 regs.Set(x, xx);
549 }
550 public override nothrow bool IsAbsoluteAddressInst() const
551 {
552 return true;
553 }
554 }
555
556 public class Ldtui : Instruction
557 {
558 public nothrow Ldtui() : base(LDTUI)
559 {
560 }
561 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
562 {
563 ulong yy = regs.Get(y);
564 ulong zz = z;
565 ulong a = yy + zz;
566 uint u = mem.ReadUInt(a, Protection.read);
567 ulong xx = u;
568 regs.Set(x, xx);
569 }
570 public override nothrow bool IsZReg() const
571 {
572 return false;
573 }
574 public override nothrow bool IsAbsoluteAddressInst() const
575 {
576 return true;
577 }
578 }
579
580 public class Ldou : Instruction
581 {
582 public nothrow Ldou() : base(LDOU)
583 {
584 }
585 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
586 {
587 ulong yy = regs.Get(y);
588 ulong zz = regs.Get(z);
589 ulong a = yy + zz;
590 ulong xx = mem.ReadULong(a, Protection.read);
591 regs.Set(x, xx);
592 }
593 public override nothrow bool IsAbsoluteAddressInst() const
594 {
595 return true;
596 }
597 }
598
599 public class Ldoui : Instruction
600 {
601 public nothrow Ldoui() : base(LDOUI)
602 {
603 }
604 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
605 {
606 ulong yy = regs.Get(y);
607 ulong zz = z;
608 ulong a = yy + zz;
609 ulong xx = mem.ReadULong(a, Protection.read);
610 regs.Set(x, xx);
611 }
612 public override nothrow bool IsZReg() const
613 {
614 return false;
615 }
616 public override nothrow bool IsAbsoluteAddressInst() const
617 {
618 return true;
619 }
620 }
621
622 public class Ldht : Instruction
623 {
624 public nothrow Ldht() : base(LDHT)
625 {
626 }
627 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
628 {
629 ulong yy = regs.Get(y);
630 ulong zz = regs.Get(z);
631 ulong a = yy + zz;
632 uint u = mem.ReadUInt(a, Protection.read);
633 ulong xx = cast<ulong>(u) << 32u;
634 regs.Set(x, xx);
635 }
636 public override nothrow bool IsAbsoluteAddressInst() const
637 {
638 return true;
639 }
640 }
641
642 public class Ldhti : Instruction
643 {
644 public nothrow Ldhti() : base(LDHTI)
645 {
646 }
647 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
648 {
649 ulong yy = regs.Get(y);
650 ulong zz = z;
651 ulong a = yy + zz;
652 uint u = mem.ReadUInt(a, Protection.read);
653 ulong xx = cast<ulong>(u) << 32u;
654 regs.Set(x, xx);
655 }
656 public override nothrow bool IsZReg() const
657 {
658 return false;
659 }
660 public override nothrow bool IsAbsoluteAddressInst() const
661 {
662 return true;
663 }
664 }
665
666 public class Ldsf : Instruction
667 {
668 public nothrow Ldsf() : base(LDSF)
669 {
670 }
671 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
672 {
673 ulong yy = regs.Get(y);
674 ulong zz = regs.Get(z);
675 ulong a = yy + zz;
676 uint u = mem.ReadUInt(a, Protection.read);
677 float f = *cast<float*>(cast<void*>(&u));
678 double d = f;
679 ulong xx = *cast<ulong*>(cast<void*>(&d));
680 regs.Set(x, xx);
681 }
682 public override nothrow bool IsAbsoluteAddressInst() const
683 {
684 return true;
685 }
686 }
687
688 public class Ldsfi : Instruction
689 {
690 public nothrow Ldsfi() : base(LDSFI)
691 {
692 }
693 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
694 {
695 ulong yy = regs.Get(y);
696 ulong zz = z;
697 ulong a = yy + zz;
698 uint u = mem.ReadUInt(a, Protection.read);
699 float f = *cast<float*>(cast<void*>(&u));
700 double d = f;
701 ulong xx = *cast<ulong*>(cast<void*>(&d));
702 regs.Set(x, xx);
703 }
704 public override nothrow bool IsZReg() const
705 {
706 return false;
707 }
708 public override nothrow bool IsAbsoluteAddressInst() const
709 {
710 return true;
711 }
712 }
713
714 public class Stb : Instruction
715 {
716 public nothrow Stb() : base(STB)
717 {
718 }
719 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
720 {
721 ulong yy = regs.Get(y);
722 ulong zz = regs.Get(z);
723 ulong a = yy + zz;
724 byte b = cast<byte>(regs.Get(x) & 0xFFu);
725 mem.WriteByte(a, b, Protection.write);
726 }
727 public override nothrow bool IsAbsoluteAddressInst() const
728 {
729 return true;
730 }
731 }
732
733 public class Stbi : Instruction
734 {
735 public nothrow Stbi() : base(STBI)
736 {
737 }
738 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
739 {
740 ulong yy = regs.Get(y);
741 ulong zz = z;
742 ulong a = yy + zz;
743 byte b = cast<byte>(regs.Get(x) & 0xFFu);
744 mem.WriteByte(a, b, Protection.write);
745 }
746 public override nothrow bool IsZReg() const
747 {
748 return false;
749 }
750 public override nothrow bool IsAbsoluteAddressInst() const
751 {
752 return true;
753 }
754 }
755
756 public class Stw : Instruction
757 {
758 public nothrow Stw() : base(STW)
759 {
760 }
761 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
762 {
763 ulong yy = regs.Get(y);
764 ulong zz = regs.Get(z);
765 ulong a = yy + zz;
766 ushort u = cast<ushort>(regs.Get(x) & 0xFFFFu);
767 mem.WriteUShort(a, u, Protection.write);
768 }
769 public override nothrow bool IsAbsoluteAddressInst() const
770 {
771 return true;
772 }
773 }
774
775 public class Stwi : Instruction
776 {
777 public nothrow Stwi() : base(STWI)
778 {
779 }
780 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
781 {
782 ulong yy = regs.Get(y);
783 ulong zz = z;
784 ulong a = yy + zz;
785 ushort u = cast<ushort>(regs.Get(x) & 0xFFFFu);
786 mem.WriteUShort(a, u, Protection.write);
787 }
788 public override nothrow bool IsZReg() const
789 {
790 return false;
791 }
792 public override nothrow bool IsAbsoluteAddressInst() const
793 {
794 return true;
795 }
796 }
797
798 public class Stt : Instruction
799 {
800 public nothrow Stt() : base(STT)
801 {
802 }
803 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
804 {
805 ulong yy = regs.Get(y);
806 ulong zz = regs.Get(z);
807 ulong a = yy + zz;
808 uint u = cast<uint>(regs.Get(x) & 0xFFFFFFFFu);
809 mem.WriteUInt(a, u, Protection.write);
810 }
811 public override nothrow bool IsAbsoluteAddressInst() const
812 {
813 return true;
814 }
815 }
816
817 public class Stti : Instruction
818 {
819 public nothrow Stti() : base(STTI)
820 {
821 }
822 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
823 {
824 ulong yy = regs.Get(y);
825 ulong zz = z;
826 ulong a = yy + zz;
827 uint u = cast<uint>(regs.Get(x) & 0xFFFFFFFFu);
828 mem.WriteUInt(a, u, Protection.write);
829 }
830 public override nothrow bool IsZReg() const
831 {
832 return false;
833 }
834 public override nothrow bool IsAbsoluteAddressInst() const
835 {
836 return true;
837 }
838 }
839
840 public class Sto : Instruction
841 {
842 public nothrow Sto() : base(STO)
843 {
844 }
845 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
846 {
847 ulong yy = regs.Get(y);
848 ulong zz = regs.Get(z);
849 ulong a = yy + zz;
850 ulong u = regs.Get(x);
851 mem.WriteULong(a, u, Protection.write);
852 }
853 public override nothrow bool IsAbsoluteAddressInst() const
854 {
855 return true;
856 }
857 }
858
859 public class Stoi : Instruction
860 {
861 public nothrow Stoi() : base(STOI)
862 {
863 }
864 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
865 {
866 ulong yy = regs.Get(y);
867 ulong zz = z;
868 ulong a = yy + zz;
869 ulong u = regs.Get(x);
870 mem.WriteULong(a, u, Protection.write);
871 }
872 public override nothrow bool IsZReg() const
873 {
874 return false;
875 }
876 public override nothrow bool IsAbsoluteAddressInst() const
877 {
878 return true;
879 }
880 }
881
882 public class Stbu : Instruction
883 {
884 public nothrow Stbu() : base(STBU)
885 {
886 }
887 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
888 {
889 ulong yy = regs.Get(y);
890 ulong zz = regs.Get(z);
891 ulong a = yy + zz;
892 byte b = cast<byte>(regs.Get(x) & 0xFFu);
893 mem.WriteByte(a, b, Protection.write);
894 }
895 public override nothrow bool IsAbsoluteAddressInst() const
896 {
897 return true;
898 }
899 }
900
901 public class Stbui : Instruction
902 {
903 public nothrow Stbui() : base(STBUI)
904 {
905 }
906 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
907 {
908 ulong yy = regs.Get(y);
909 ulong zz = z;
910 ulong a = yy + zz;
911 byte b = cast<byte>(regs.Get(x) & 0xFFu);
912 mem.WriteByte(a, b, Protection.write);
913 }
914 public override nothrow bool IsZReg() const
915 {
916 return false;
917 }
918 public override nothrow bool IsAbsoluteAddressInst() const
919 {
920 return true;
921 }
922 }
923
924 public class Stwu : Instruction
925 {
926 public nothrow Stwu() : base(STWU)
927 {
928 }
929 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
930 {
931 ulong yy = regs.Get(y);
932 ulong zz = regs.Get(z);
933 ulong a = yy + zz;
934 ushort u = cast<ushort>(regs.Get(x) & 0xFFFFu);
935 mem.WriteUShort(a, u, Protection.write);
936 }
937 public override nothrow bool IsAbsoluteAddressInst() const
938 {
939 return true;
940 }
941 }
942
943 public class Stwui : Instruction
944 {
945 public nothrow Stwui() : base(STWUI)
946 {
947 }
948 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
949 {
950 ulong yy = regs.Get(y);
951 ulong zz = z;
952 ulong a = yy + zz;
953 ushort u = cast<ushort>(regs.Get(x) & 0xFFFFu);
954 mem.WriteUShort(a, u, Protection.write);
955 }
956 public override nothrow bool IsZReg() const
957 {
958 return false;
959 }
960 public override nothrow bool IsAbsoluteAddressInst() const
961 {
962 return true;
963 }
964 }
965
966 public class Sttu : Instruction
967 {
968 public nothrow Sttu() : base(STTU)
969 {
970 }
971 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
972 {
973 ulong yy = regs.Get(y);
974 ulong zz = regs.Get(z);
975 ulong a = yy + zz;
976 uint u = cast<uint>(regs.Get(x) & 0xFFFFFFFFu);
977 mem.WriteUInt(a, u, Protection.write);
978 }
979 public override nothrow bool IsAbsoluteAddressInst() const
980 {
981 return true;
982 }
983 }
984
985 public class Sttui : Instruction
986 {
987 public nothrow Sttui() : base(STTUI)
988 {
989 }
990 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
991 {
992 ulong yy = regs.Get(y);
993 ulong zz = z;
994 ulong a = yy + zz;
995 uint u = cast<uint>(regs.Get(x) & 0xFFFFFFFFu);
996 mem.WriteUInt(a, u, Protection.write);
997 }
998 public override nothrow bool IsZReg() const
999 {
1000 return false;
1001 }
1002 public override nothrow bool IsAbsoluteAddressInst() const
1003 {
1004 return true;
1005 }
1006 }
1007
1008 public class Stou : Instruction
1009 {
1010 public nothrow Stou() : base(STOU)
1011 {
1012 }
1013 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1014 {
1015 ulong yy = regs.Get(y);
1016 ulong zz = regs.Get(z);
1017 ulong a = yy + zz;
1018 ulong u = regs.Get(x);
1019 mem.WriteULong(a, u, Protection.write);
1020 }
1021 public override nothrow bool IsAbsoluteAddressInst() const
1022 {
1023 return true;
1024 }
1025 }
1026
1027 public class Stoui : Instruction
1028 {
1029 public nothrow Stoui() : base(STOUI)
1030 {
1031 }
1032 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1033 {
1034 ulong yy = regs.Get(y);
1035 ulong zz = z;
1036 ulong a = yy + zz;
1037 ulong u = regs.Get(x);
1038 mem.WriteULong(a, u, Protection.write);
1039 }
1040 public override nothrow bool IsZReg() const
1041 {
1042 return false;
1043 }
1044 public override nothrow bool IsAbsoluteAddressInst() const
1045 {
1046 return true;
1047 }
1048 }
1049
1050 public class Stht : Instruction
1051 {
1052 public nothrow Stht() : base(STHT)
1053 {
1054 }
1055 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1056 {
1057 ulong yy = regs.Get(y);
1058 ulong zz = regs.Get(z);
1059 ulong a = yy + zz;
1060 uint u = cast<uint>(regs.Get(x) >> 32u);
1061 mem.WriteUInt(a, u, Protection.write);
1062 }
1063 public override nothrow bool IsAbsoluteAddressInst() const
1064 {
1065 return true;
1066 }
1067 }
1068
1069 public class Sthti : Instruction
1070 {
1071 public nothrow Sthti() : base(STHTI)
1072 {
1073 }
1074 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1075 {
1076 ulong yy = regs.Get(y);
1077 ulong zz = z;
1078 ulong a = yy + zz;
1079 uint u = cast<uint>(regs.Get(x) >> 32u);
1080 mem.WriteUInt(a, u, Protection.write);
1081 }
1082 public override nothrow bool IsZReg() const
1083 {
1084 return false;
1085 }
1086 public override nothrow bool IsAbsoluteAddressInst() const
1087 {
1088 return true;
1089 }
1090 }
1091
1092 public class Stsf : Instruction
1093 {
1094 public nothrow Stsf() : base(STSF)
1095 {
1096 }
1097 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1098 {
1099 ulong yy = regs.Get(y);
1100 ulong zz = regs.Get(z);
1101 ulong a = yy + zz;
1102 ulong v = regs.Get(x);
1103 double d = *cast<double*>(cast<void*>(&v));
1104 float f = cast<float>(d);
1105 uint u = *cast<uint*>(cast<void*>(&f));
1106 mem.WriteUInt(a, u, Protection.write);
1107 }
1108 public override nothrow bool IsAbsoluteAddressInst() const
1109 {
1110 return true;
1111 }
1112 }
1113
1114 public class Stsfi : Instruction
1115 {
1116 public nothrow Stsfi() : base(STSFI)
1117 {
1118 }
1119 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1120 {
1121 ulong yy = regs.Get(y);
1122 ulong zz = z;
1123 ulong a = yy + zz;
1124 ulong v = regs.Get(x);
1125 double d = *cast<double*>(cast<void*>(&v));
1126 float f = cast<float>(d);
1127 uint u = *cast<uint*>(cast<void*>(&f));
1128 mem.WriteUInt(a, u, Protection.write);
1129 }
1130 public override nothrow bool IsZReg() const
1131 {
1132 return false;
1133 }
1134 public override nothrow bool IsAbsoluteAddressInst() const
1135 {
1136 return true;
1137 }
1138 }
1139
1140 public class Stco : Instruction
1141 {
1142 public nothrow Stco() : base(STCO)
1143 {
1144 }
1145 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1146 {
1147 ulong yy = regs.Get(y);
1148 ulong zz = regs.Get(z);
1149 ulong a = yy + zz;
1150 ulong u = x;
1151 mem.WriteULong(a, u, Protection.write);
1152 }
1153 public override nothrow bool IsAbsoluteAddressInst() const
1154 {
1155 return true;
1156 }
1157 }
1158
1159 public class Stcoi : Instruction
1160 {
1161 public nothrow Stcoi() : base(STCOI)
1162 {
1163 }
1164 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1165 {
1166 ulong yy = regs.Get(y);
1167 ulong zz = z;
1168 ulong a = yy + zz;
1169 ulong u = x;
1170 mem.WriteULong(a, u, Protection.write);
1171 }
1172 public override nothrow bool IsZReg() const
1173 {
1174 return false;
1175 }
1176 public override nothrow bool IsAbsoluteAddressInst() const
1177 {
1178 return true;
1179 }
1180 }
1181
1182 public class Add : Instruction
1183 {
1184 public nothrow Add() : base(ADD)
1185 {
1186 }
1187 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1188 {
1189 long yy = cast<long>(regs.Get(y));
1190 long zz = cast<long>(regs.Get(z));
1191 long xx = yy + zz;
1192 regs.Set(x, cast<ulong>(xx));
1193 }
1194 }
1195
1196 public class Addi : Instruction
1197 {
1198 public nothrow Addi() : base(ADDI)
1199 {
1200 }
1201 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1202 {
1203 long yy = cast<long>(regs.Get(y));
1204 long zz = z;
1205 long xx = yy + zz;
1206 regs.Set(x, cast<ulong>(xx));
1207 }
1208 public override nothrow bool IsZReg() const
1209 {
1210 return false;
1211 }
1212 }
1213
1214 public class Sub : Instruction
1215 {
1216 public nothrow Sub() : base(SUB)
1217 {
1218 }
1219 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1220 {
1221 long yy = cast<long>(regs.Get(y));
1222 long zz = cast<long>(regs.Get(z));
1223 long xx = yy - zz;
1224 regs.Set(x, cast<ulong>(xx));
1225 }
1226 }
1227
1228 public class Subi : Instruction
1229 {
1230 public nothrow Subi() : base(SUBI)
1231 {
1232 }
1233 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1234 {
1235 long yy = cast<long>(regs.Get(y));
1236 long zz = z;
1237 long xx = yy - zz;
1238 regs.Set(x, cast<ulong>(xx));
1239 }
1240 public override nothrow bool IsZReg() const
1241 {
1242 return false;
1243 }
1244 }
1245
1246 public class Mul : Instruction
1247 {
1248 public nothrow Mul() : base(MUL)
1249 {
1250 }
1251 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1252 {
1253 long yy = cast<long>(regs.Get(y));
1254 long zz = cast<long>(regs.Get(z));
1255 long xx = yy * zz;
1256 regs.Set(x, cast<ulong>(xx));
1257 }
1258 }
1259
1260 public class Muli : Instruction
1261 {
1262 public nothrow Muli() : base(MULI)
1263 {
1264 }
1265 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1266 {
1267 long yy = cast<long>(regs.Get(y));
1268 long zz = z;
1269 long xx = yy * zz;
1270 regs.Set(x, cast<ulong>(xx));
1271 }
1272 public override nothrow bool IsZReg() const
1273 {
1274 return false;
1275 }
1276 }
1277
1278 public class Div : Instruction
1279 {
1280 public nothrow Div() : base(DIV)
1281 {
1282 }
1283 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1284 {
1285 long yy = cast<long>(regs.Get(y));
1286 long zz = cast<long>(regs.Get(z));
1287 long xx = 0;
1288 long rr = yy;
1289 if (zz != 0)
1290 {
1291 xx = yy / zz;
1292 rr = yy % zz;
1293 }
1294 regs.Set(x, cast<ulong>(xx));
1295 regs.SetSpecial(Registers.rR, cast<ulong>(rr));
1296 }
1297 }
1298
1299 public class Divi : Instruction
1300 {
1301 public nothrow Divi() : base(DIVI)
1302 {
1303 }
1304 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1305 {
1306 long yy = cast<long>(regs.Get(y));
1307 long zz = z;
1308 long xx = 0;
1309 long rr = yy;
1310 if (zz != 0)
1311 {
1312 xx = yy / zz;
1313 rr = yy % zz;
1314 }
1315 regs.Set(x, cast<ulong>(xx));
1316 regs.SetSpecial(Registers.rR, cast<ulong>(rr));
1317 }
1318 public override nothrow bool IsZReg() const
1319 {
1320 return false;
1321 }
1322 }
1323
1324 public class Addu : Instruction
1325 {
1326 public nothrow Addu() : base(ADDU)
1327 {
1328 }
1329 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1330 {
1331 ulong yy = regs.Get(y);
1332 ulong zz = regs.Get(z);
1333 ulong xx = yy + zz;
1334 regs.Set(x, xx);
1335 }
1336 }
1337
1338 public class Addui : Instruction
1339 {
1340 public nothrow Addui() : base(ADDUI)
1341 {
1342 }
1343 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1344 {
1345 ulong yy = regs.Get(y);
1346 ulong zz = z;
1347 ulong xx = yy + zz;
1348 regs.Set(x, xx);
1349 }
1350 public override nothrow bool IsZReg() const
1351 {
1352 return false;
1353 }
1354 }
1355
1356 public class Subu : Instruction
1357 {
1358 public nothrow Subu() : base(SUBU)
1359 {
1360 }
1361 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1362 {
1363 ulong yy = regs.Get(y);
1364 ulong zz = regs.Get(z);
1365 ulong xx = yy - zz;
1366 regs.Set(x, xx);
1367 }
1368 }
1369
1370 public class Subui : Instruction
1371 {
1372 public nothrow Subui() : base(SUBUI)
1373 {
1374 }
1375 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1376 {
1377 ulong yy = regs.Get(y);
1378 ulong zz = z;
1379 ulong xx = yy - zz;
1380 regs.Set(x, xx);
1381 }
1382 public override nothrow bool IsZReg() const
1383 {
1384 return false;
1385 }
1386 }
1387
1388 public class Mulu : Instruction
1389 {
1390 public nothrow Mulu() : base(MULU)
1391 {
1392 }
1393 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1394 {
1395
1396 ulong yy = regs.Get(y);
1397 ulong zz = regs.Get(z);
1398 ulong xx = yy * zz;
1399 regs.Set(x, xx);
1400 }
1401 }
1402
1403 public class Mului : Instruction
1404 {
1405 public nothrow Mului() : base(MULUI)
1406 {
1407 }
1408 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1409 {
1410
1411 ulong yy = regs.Get(y);
1412 ulong zz = z;
1413 ulong xx = yy * zz;
1414 regs.Set(x, xx);
1415 }
1416 public override nothrow bool IsZReg() const
1417 {
1418 return false;
1419 }
1420 }
1421
1422 public class Divu : Instruction
1423 {
1424 public nothrow Divu() : base(DIVU)
1425 {
1426 }
1427 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1428 {
1429
1430 ulong yy = regs.Get(y);
1431 ulong zz = regs.Get(z);
1432 ulong xx = 0u;
1433 ulong rr = yy;
1434 if (zz != 0u)
1435 {
1436 xx = yy / zz;
1437 rr = yy % zz;
1438 }
1439 regs.Set(x, xx);
1440 regs.SetSpecial(Registers.rR, rr);
1441 }
1442 }
1443
1444 public class Divui : Instruction
1445 {
1446 public nothrow Divui() : base(DIVUI)
1447 {
1448 }
1449 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1450 {
1451
1452 ulong yy = regs.Get(y);
1453 ulong zz = z;
1454 ulong xx = 0u;
1455 ulong rr = yy;
1456 if (zz != 0u)
1457 {
1458 xx = yy / zz;
1459 rr = yy % zz;
1460 }
1461 regs.Set(x, xx);
1462 regs.SetSpecial(Registers.rR, rr);
1463 }
1464 public override nothrow bool IsZReg() const
1465 {
1466 return false;
1467 }
1468 }
1469
1470 public class I2Addu : Instruction
1471 {
1472 public nothrow I2Addu() : base(I2ADDU)
1473 {
1474 }
1475 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1476 {
1477 ulong yy = regs.Get(y);
1478 ulong zz = regs.Get(z);
1479 ulong xx = (yy << 1u) + zz;
1480 regs.Set(x, xx);
1481 }
1482 }
1483
1484 public class I2Addui : Instruction
1485 {
1486 public nothrow I2Addui() : base(I2ADDUI)
1487 {
1488 }
1489 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1490 {
1491 ulong yy = regs.Get(y);
1492 ulong zz = z;
1493 ulong xx = (yy << 1u) + zz;
1494 regs.Set(x, xx);
1495 }
1496 public override nothrow bool IsZReg() const
1497 {
1498 return false;
1499 }
1500 }
1501
1502 public class I4Addu : Instruction
1503 {
1504 public nothrow I4Addu() : base(I4ADDU)
1505 {
1506 }
1507 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1508 {
1509 ulong yy = regs.Get(y);
1510 ulong zz = regs.Get(z);
1511 ulong xx = (yy << 2u) + zz;
1512 regs.Set(x, xx);
1513 }
1514 }
1515
1516 public class I4Addui : Instruction
1517 {
1518 public nothrow I4Addui() : base(I4ADDUI)
1519 {
1520 }
1521 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1522 {
1523 ulong yy = regs.Get(y);
1524 ulong zz = z;
1525 ulong xx = (yy << 2u) + zz;
1526 regs.Set(x, xx);
1527 }
1528 public override nothrow bool IsZReg() const
1529 {
1530 return false;
1531 }
1532 }
1533
1534 public class I8Addu : Instruction
1535 {
1536 public nothrow I8Addu() : base(I8ADDU)
1537 {
1538 }
1539 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1540 {
1541 ulong yy = regs.Get(y);
1542 ulong zz = regs.Get(z);
1543 ulong xx = (yy << 3u) + zz;
1544 regs.Set(x, xx);
1545 }
1546 }
1547
1548 public class I8Addui : Instruction
1549 {
1550 public nothrow I8Addui() : base(I8ADDUI)
1551 {
1552 }
1553 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1554 {
1555 ulong yy = regs.Get(y);
1556 ulong zz = z;
1557 ulong xx = (yy << 3u) + zz;
1558 regs.Set(x, xx);
1559 }
1560 public override nothrow bool IsZReg() const
1561 {
1562 return false;
1563 }
1564 }
1565
1566 public class I16Addu : Instruction
1567 {
1568 public nothrow I16Addu() : base(I16ADDU)
1569 {
1570 }
1571 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1572 {
1573 ulong yy = regs.Get(y);
1574 ulong zz = regs.Get(z);
1575 ulong xx = (yy << 4u) + zz;
1576 regs.Set(x, xx);
1577 }
1578 }
1579
1580 public class I16Addui : Instruction
1581 {
1582 public nothrow I16Addui() : base(I16ADDUI)
1583 {
1584 }
1585 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1586 {
1587 ulong yy = regs.Get(y);
1588 ulong zz = z;
1589 ulong xx = (yy << 4u) + zz;
1590 regs.Set(x, xx);
1591 }
1592 public override nothrow bool IsZReg() const
1593 {
1594 return false;
1595 }
1596 }
1597
1598 public class Neg : Instruction
1599 {
1600 public nothrow Neg() : base(NEG)
1601 {
1602 }
1603 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1604 {
1605
1606 long yy = y;
1607 long zz = cast<long>(regs.Get(z));
1608 long xx = yy - zz;
1609 regs.Set(x, cast<ulong>(xx));
1610 }
1611 public override nothrow bool IsNegateInstruction() const
1612 {
1613 return true;
1614 }
1615 }
1616
1617 public class Negi : Instruction
1618 {
1619 public nothrow Negi() : base(NEGI)
1620 {
1621 }
1622 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1623 {
1624
1625 long yy = y;
1626 long zz = z;
1627 long xx = yy - zz;
1628 regs.Set(x, cast<ulong>(xx));
1629 }
1630 public override nothrow bool IsZReg() const
1631 {
1632 return false;
1633 }
1634 public override nothrow bool IsNegateInstruction() const
1635 {
1636 return true;
1637 }
1638 }
1639
1640 public class Negu : Instruction
1641 {
1642 public nothrow Negu() : base(NEGU)
1643 {
1644 }
1645 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1646 {
1647 ulong yy = y;
1648 ulong zz = regs.Get(z);
1649 ulong xx = yy - zz;
1650 regs.Set(x, xx);
1651 }
1652 public override nothrow bool IsNegateInstruction() const
1653 {
1654 return true;
1655 }
1656 }
1657
1658 public class Negui : Instruction
1659 {
1660 public nothrow Negui() : base(NEGUI)
1661 {
1662 }
1663 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1664 {
1665 ulong yy = y;
1666 ulong zz = z;
1667 ulong xx = yy - zz;
1668 regs.Set(x, xx);
1669 }
1670 public override nothrow bool IsZReg() const
1671 {
1672 return false;
1673 }
1674 public override nothrow bool IsNegateInstruction() const
1675 {
1676 return true;
1677 }
1678 }
1679
1680 public class Sl : Instruction
1681 {
1682 public nothrow Sl() : base(SL)
1683 {
1684 }
1685 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1686 {
1687
1688 long yy = cast<long>(regs.Get(y));
1689 long zz = Abs(cast<long>(regs.Get(z)));
1690 long xx = yy << zz;
1691 regs.Set(x, cast<ulong>(xx));
1692 }
1693 }
1694
1695 public class Sli : Instruction
1696 {
1697 public nothrow Sli() : base(SLI)
1698 {
1699 }
1700 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1701 {
1702
1703 long yy = cast<long>(regs.Get(y));
1704 long zz = z;
1705 long xx = yy << zz;
1706 regs.Set(x, cast<ulong>(xx));
1707 }
1708 public override nothrow bool IsZReg() const
1709 {
1710 return false;
1711 }
1712 }
1713
1714 public class Slu : Instruction
1715 {
1716 public nothrow Slu() : base(SLU)
1717 {
1718 }
1719 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1720 {
1721 ulong yy = regs.Get(y);
1722 ulong zz = regs.Get(z);
1723 ulong xx = yy << zz;
1724 regs.Set(x, xx);
1725 }
1726 }
1727
1728 public class Slui : Instruction
1729 {
1730 public nothrow Slui() : base(SLUI)
1731 {
1732 }
1733 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1734 {
1735 ulong yy = regs.Get(y);
1736 ulong zz = z;
1737 ulong xx = yy << zz;
1738 regs.Set(x, xx);
1739 }
1740 public override nothrow bool IsZReg() const
1741 {
1742 return false;
1743 }
1744 }
1745
1746 public class Sr : Instruction
1747 {
1748 public nothrow Sr() : base(SR)
1749 {
1750 }
1751 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1752 {
1753 long yy = cast<long>(regs.Get(y));
1754 long zz = Abs(cast<long>(regs.Get(z)));
1755 long xx = yy >> zz;
1756 regs.Set(x, cast<ulong>(xx));
1757 }
1758 }
1759
1760 public class Sri : Instruction
1761 {
1762 public nothrow Sri() : base(SRI)
1763 {
1764 }
1765 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1766 {
1767 long yy = cast<long>(regs.Get(y));
1768 long zz = z;
1769 long xx = yy >> zz;
1770 regs.Set(x, cast<ulong>(xx));
1771 }
1772 public override nothrow bool IsZReg() const
1773 {
1774 return false;
1775 }
1776 }
1777
1778 public class Sru : Instruction
1779 {
1780 public nothrow Sru() : base(SRU)
1781 {
1782 }
1783 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1784 {
1785 ulong yy = regs.Get(y);
1786 ulong zz = regs.Get(z);
1787 ulong xx = yy >> zz;
1788 regs.Set(x, xx);
1789 }
1790 }
1791
1792 public class Srui : Instruction
1793 {
1794 public nothrow Srui() : base(SRUI)
1795 {
1796 }
1797 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1798 {
1799 ulong yy = regs.Get(y);
1800 ulong zz = z;
1801 ulong xx = yy >> zz;
1802 regs.Set(x, xx);
1803 }
1804 public override nothrow bool IsZReg() const
1805 {
1806 return false;
1807 }
1808 }
1809
1810 public class Cmp : Instruction
1811 {
1812 public nothrow Cmp() : base(CMP)
1813 {
1814 }
1815 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1816 {
1817 long yy = cast<long>(regs.Get(y));
1818 long zz = cast<long>(regs.Get(z));
1819 long gr = cast<long>(yy > zz);
1820 long ls = cast<long>(yy < zz);
1821 long xx = gr - ls;
1822 regs.Set(x, cast<ulong>(xx));
1823 }
1824 }
1825
1826 public class Cmpi : Instruction
1827 {
1828 public nothrow Cmpi() : base(CMPI)
1829 {
1830 }
1831 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1832 {
1833 long yy = cast<long>(regs.Get(y));
1834 long zz = z;
1835 long gr = cast<long>(yy > zz);
1836 long ls = cast<long>(yy < zz);
1837 long xx = gr - ls;
1838 regs.Set(x, cast<ulong>(xx));
1839 }
1840 public override nothrow bool IsZReg() const
1841 {
1842 return false;
1843 }
1844 }
1845
1846 public class Cmpu : Instruction
1847 {
1848 public nothrow Cmpu() : base(CMPU)
1849 {
1850 }
1851 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1852 {
1853 ulong yy = regs.Get(y);
1854 ulong zz = regs.Get(z);
1855 long gr = cast<long>(yy > zz);
1856 long ls = cast<long>(yy < zz);
1857 long xx = gr - ls;
1858 regs.Set(x, cast<ulong>(xx));
1859 }
1860 }
1861
1862 public class Cmpui : Instruction
1863 {
1864 public nothrow Cmpui() : base(CMPUI)
1865 {
1866 }
1867 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1868 {
1869 ulong yy = regs.Get(y);
1870 ulong zz = z;
1871 long gr = cast<long>(yy > zz);
1872 long ls = cast<long>(yy < zz);
1873 long xx = gr - ls;
1874 regs.Set(x, cast<ulong>(xx));
1875 }
1876 public override nothrow bool IsZReg() const
1877 {
1878 return false;
1879 }
1880 }
1881
1882 public class Csn : Instruction
1883 {
1884 public nothrow Csn() : base(CSN)
1885 {
1886 }
1887 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1888 {
1889 long yy = cast<long>(regs.Get(y));
1890 if (yy < 0)
1891 {
1892 ulong zz = regs.Get(z);
1893 ulong xx = zz;
1894 regs.Set(x, xx);
1895 }
1896 }
1897 }
1898
1899 public class Csni : Instruction
1900 {
1901 public nothrow Csni() : base(CSNI)
1902 {
1903 }
1904 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1905 {
1906 long yy = cast<long>(regs.Get(y));
1907 if (yy < 0)
1908 {
1909 ulong zz = z;
1910 ulong xx = zz;
1911 regs.Set(x, xx);
1912 }
1913 }
1914 public override nothrow bool IsZReg() const
1915 {
1916 return false;
1917 }
1918 }
1919
1920 public class Csz : Instruction
1921 {
1922 public nothrow Csz() : base(CSZ)
1923 {
1924 }
1925 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1926 {
1927 ulong yy = regs.Get(y);
1928 if (yy == 0u)
1929 {
1930 ulong zz = regs.Get(z);
1931 ulong xx = zz;
1932 regs.Set(x, xx);
1933 }
1934 }
1935 }
1936
1937 public class Cszi : Instruction
1938 {
1939 public nothrow Cszi() : base(CSZI)
1940 {
1941 }
1942 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1943 {
1944 ulong yy = regs.Get(y);
1945 if (yy == 0u)
1946 {
1947 ulong zz = z;
1948 ulong xx = zz;
1949 regs.Set(x, xx);
1950 }
1951 }
1952 public override nothrow bool IsZReg() const
1953 {
1954 return false;
1955 }
1956 }
1957
1958 public class Csp : Instruction
1959 {
1960 public nothrow Csp() : base(CSP)
1961 {
1962 }
1963 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1964 {
1965 long yy = cast<long>(regs.Get(y));
1966 if (yy > 0)
1967 {
1968 ulong zz = regs.Get(z);
1969 ulong xx = zz;
1970 regs.Set(x, xx);
1971 }
1972 }
1973 }
1974
1975 public class Cspi : Instruction
1976 {
1977 public nothrow Cspi() : base(CSPI)
1978 {
1979 }
1980 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
1981 {
1982 long yy = cast<long>(regs.Get(y));
1983 if (yy > 0)
1984 {
1985 ulong zz = z;
1986 ulong xx = zz;
1987 regs.Set(x, xx);
1988 }
1989 }
1990 public override nothrow bool IsZReg() const
1991 {
1992 return false;
1993 }
1994 }
1995
1996 public class Csod : Instruction
1997 {
1998 public nothrow Csod() : base(CSOD)
1999 {
2000 }
2001 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2002 {
2003 ulong yy = regs.Get(y);
2004 if ((yy & 0x1u) != 0u)
2005 {
2006 ulong zz = regs.Get(z);
2007 ulong xx = zz;
2008 regs.Set(x, xx);
2009 }
2010 }
2011 }
2012
2013 public class Csodi : Instruction
2014 {
2015 public nothrow Csodi() : base(CSODI)
2016 {
2017 }
2018 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2019 {
2020 ulong yy = regs.Get(y);
2021 if ((yy & 0x1u) != 0u)
2022 {
2023 ulong zz = z;
2024 ulong xx = zz;
2025 regs.Set(x, xx);
2026 }
2027 }
2028 public override nothrow bool IsZReg() const
2029 {
2030 return false;
2031 }
2032 }
2033
2034 public class Csnn : Instruction
2035 {
2036 public nothrow Csnn() : base(CSNN)
2037 {
2038 }
2039 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2040 {
2041 long yy = cast<long>(regs.Get(y));
2042 if (yy >= 0)
2043 {
2044 ulong zz = regs.Get(z);
2045 ulong xx = zz;
2046 regs.Set(x, xx);
2047 }
2048 }
2049 }
2050
2051 public class Csnni : Instruction
2052 {
2053 public nothrow Csnni() : base(CSNNI)
2054 {
2055 }
2056 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2057 {
2058 long yy = cast<long>(regs.Get(y));
2059 if (yy >= 0)
2060 {
2061 ulong zz = z;
2062 ulong xx = zz;
2063 regs.Set(x, xx);
2064 }
2065 }
2066 public override nothrow bool IsZReg() const
2067 {
2068 return false;
2069 }
2070 }
2071
2072 public class Csnz : Instruction
2073 {
2074 public nothrow Csnz() : base(CSNZ)
2075 {
2076 }
2077 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2078 {
2079 ulong yy = regs.Get(y);
2080 if (yy != 0u)
2081 {
2082 ulong zz = regs.Get(z);
2083 ulong xx = zz;
2084 regs.Set(x, xx);
2085 }
2086 }
2087 }
2088
2089 public class Csnzi : Instruction
2090 {
2091 public nothrow Csnzi() : base(CSNZI)
2092 {
2093 }
2094 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2095 {
2096 ulong yy = regs.Get(y);
2097 if (yy != 0u)
2098 {
2099 ulong zz = z;
2100 ulong xx = zz;
2101 regs.Set(x, xx);
2102 }
2103 }
2104 public override nothrow bool IsZReg() const
2105 {
2106 return false;
2107 }
2108 }
2109
2110 public class Csnp : Instruction
2111 {
2112 public nothrow Csnp() : base(CSNP)
2113 {
2114 }
2115 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2116 {
2117 long yy = cast<long>(regs.Get(y));
2118 if (yy <= 0)
2119 {
2120 ulong zz = regs.Get(z);
2121 ulong xx = zz;
2122 regs.Set(x, xx);
2123 }
2124 }
2125 }
2126
2127 public class Csnpi : Instruction
2128 {
2129 public nothrow Csnpi() : base(CSNPI)
2130 {
2131 }
2132 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2133 {
2134 long yy = cast<long>(regs.Get(y));
2135 if (yy <= 0)
2136 {
2137 ulong zz = z;
2138 ulong xx = zz;
2139 regs.Set(x, xx);
2140 }
2141 }
2142 public override nothrow bool IsZReg() const
2143 {
2144 return false;
2145 }
2146 }
2147
2148 public class Csev : Instruction
2149 {
2150 public nothrow Csev() : base(CSEV)
2151 {
2152 }
2153 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2154 {
2155 ulong yy = regs.Get(y);
2156 if ((yy & 0x1u) == 0u)
2157 {
2158 ulong zz = regs.Get(z);
2159 ulong xx = zz;
2160 regs.Set(x, xx);
2161 }
2162 }
2163 }
2164
2165 public class Csevi : Instruction
2166 {
2167 public nothrow Csevi() : base(CSEVI)
2168 {
2169 }
2170 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2171 {
2172 ulong yy = regs.Get(y);
2173 if ((yy & 0x1u) == 0u)
2174 {
2175 ulong zz = z;
2176 ulong xx = zz;
2177 regs.Set(x, xx);
2178 }
2179 }
2180 public override nothrow bool IsZReg() const
2181 {
2182 return false;
2183 }
2184 }
2185
2186 public class Zsn : Instruction
2187 {
2188 public nothrow Zsn() : base(ZSN)
2189 {
2190 }
2191 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2192 {
2193 long yy = cast<long>(regs.Get(y));
2194 if (yy < 0)
2195 {
2196 ulong zz = regs.Get(z);
2197 ulong xx = zz;
2198 regs.Set(x, xx);
2199 }
2200 else
2201 {
2202 ulong xx = 0u;
2203 regs.Set(x, xx);
2204 }
2205 }
2206 }
2207
2208 public class Zsni : Instruction
2209 {
2210 public nothrow Zsni() : base(ZSNI)
2211 {
2212 }
2213 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2214 {
2215 long yy = cast<long>(regs.Get(y));
2216 if (yy < 0)
2217 {
2218 ulong zz = z;
2219 ulong xx = zz;
2220 regs.Set(x, xx);
2221 }
2222 else
2223 {
2224 ulong xx = 0u;
2225 regs.Set(x, xx);
2226 }
2227 }
2228 public override nothrow bool IsZReg() const
2229 {
2230 return false;
2231 }
2232 }
2233
2234 public class Zsz : Instruction
2235 {
2236 public nothrow Zsz() : base(ZSZ)
2237 {
2238 }
2239 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2240 {
2241 ulong yy = regs.Get(y);
2242 if (yy == 0u)
2243 {
2244 ulong zz = regs.Get(z);
2245 ulong xx = zz;
2246 regs.Set(x, xx);
2247 }
2248 else
2249 {
2250 ulong xx = 0u;
2251 regs.Set(x, xx);
2252 }
2253 }
2254 }
2255
2256 public class Zszi : Instruction
2257 {
2258 public nothrow Zszi() : base(ZSZI)
2259 {
2260 }
2261 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2262 {
2263 ulong yy = regs.Get(y);
2264 if (yy == 0u)
2265 {
2266 ulong zz = z;
2267 ulong xx = zz;
2268 regs.Set(x, xx);
2269 }
2270 else
2271 {
2272 ulong xx = 0u;
2273 regs.Set(x, xx);
2274 }
2275 }
2276 public override nothrow bool IsZReg() const
2277 {
2278 return false;
2279 }
2280 }
2281
2282 public class Zsp : Instruction
2283 {
2284 public nothrow Zsp() : base(ZSP)
2285 {
2286 }
2287 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2288 {
2289 long yy = cast<long>(regs.Get(y));
2290 if (yy > 0)
2291 {
2292 ulong zz = regs.Get(z);
2293 ulong xx = zz;
2294 regs.Set(x, xx);
2295 }
2296 else
2297 {
2298 ulong xx = 0u;
2299 regs.Set(x, xx);
2300 }
2301 }
2302 }
2303
2304 public class Zspi : Instruction
2305 {
2306 public nothrow Zspi() : base(ZSPI)
2307 {
2308 }
2309 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2310 {
2311 long yy = cast<long>(regs.Get(y));
2312 if (yy > 0)
2313 {
2314 ulong zz = z;
2315 ulong xx = zz;
2316 regs.Set(x, xx);
2317 }
2318 else
2319 {
2320 ulong xx = 0u;
2321 regs.Set(x, xx);
2322 }
2323 }
2324 public override nothrow bool IsZReg() const
2325 {
2326 return false;
2327 }
2328 }
2329
2330 public class Zsod : Instruction
2331 {
2332 public nothrow Zsod() : base(ZSOD)
2333 {
2334 }
2335 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2336 {
2337 ulong yy = regs.Get(y);
2338 if ((yy & 0x1u) != 0u)
2339 {
2340 ulong zz = regs.Get(z);
2341 ulong xx = zz;
2342 regs.Set(x, xx);
2343 }
2344 else
2345 {
2346 ulong xx = 0u;
2347 regs.Set(x, xx);
2348 }
2349 }
2350 }
2351
2352 public class Zsodi : Instruction
2353 {
2354 public nothrow Zsodi() : base(ZSODI)
2355 {
2356 }
2357 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2358 {
2359 ulong yy = regs.Get(y);
2360 if ((yy & 0x1u) != 0u)
2361 {
2362 ulong zz = z;
2363 ulong xx = zz;
2364 regs.Set(x, xx);
2365 }
2366 else
2367 {
2368 ulong xx = 0u;
2369 regs.Set(x, xx);
2370 }
2371 }
2372 public override nothrow bool IsZReg() const
2373 {
2374 return false;
2375 }
2376 }
2377
2378 public class Zsnn : Instruction
2379 {
2380 public nothrow Zsnn() : base(ZSNN)
2381 {
2382 }
2383 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2384 {
2385 long yy = cast<long>(regs.Get(y));
2386 if (yy >= 0)
2387 {
2388 ulong zz = regs.Get(z);
2389 ulong xx = zz;
2390 regs.Set(x, xx);
2391 }
2392 else
2393 {
2394 ulong xx = 0u;
2395 regs.Set(x, xx);
2396 }
2397 }
2398 }
2399
2400 public class Zsnni : Instruction
2401 {
2402 public nothrow Zsnni() : base(ZSNNI)
2403 {
2404 }
2405 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2406 {
2407 long yy = cast<long>(regs.Get(y));
2408 if (yy >= 0)
2409 {
2410 ulong zz = z;
2411 ulong xx = zz;
2412 regs.Set(x, xx);
2413 }
2414 else
2415 {
2416 ulong xx = 0u;
2417 regs.Set(x, xx);
2418 }
2419 }
2420 public override nothrow bool IsZReg() const
2421 {
2422 return false;
2423 }
2424 }
2425
2426 public class Zsnz : Instruction
2427 {
2428 public nothrow Zsnz() : base(ZSNZ)
2429 {
2430 }
2431 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2432 {
2433 ulong yy = regs.Get(y);
2434 if (yy != 0u)
2435 {
2436 ulong zz = regs.Get(z);
2437 ulong xx = zz;
2438 regs.Set(x, xx);
2439 }
2440 else
2441 {
2442 ulong xx = 0u;
2443 regs.Set(x, xx);
2444 }
2445 }
2446 }
2447
2448 public class Zsnzi : Instruction
2449 {
2450 public nothrow Zsnzi() : base(ZSNZI)
2451 {
2452 }
2453 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2454 {
2455 ulong yy = regs.Get(y);
2456 if (yy != 0u)
2457 {
2458 ulong zz = z;
2459 ulong xx = zz;
2460 regs.Set(x, xx);
2461 }
2462 else
2463 {
2464 ulong xx = 0u;
2465 regs.Set(x, xx);
2466 }
2467 }
2468 public override nothrow bool IsZReg() const
2469 {
2470 return false;
2471 }
2472 }
2473
2474 public class Zsnp : Instruction
2475 {
2476 public nothrow Zsnp() : base(ZSNP)
2477 {
2478 }
2479 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2480 {
2481 long yy = cast<long>(regs.Get(y));
2482 if (yy <= 0)
2483 {
2484 ulong zz = regs.Get(z);
2485 ulong xx = zz;
2486 regs.Set(x, xx);
2487 }
2488 else
2489 {
2490 ulong xx = 0u;
2491 regs.Set(x, xx);
2492 }
2493 }
2494 }
2495
2496 public class Zsnpi : Instruction
2497 {
2498 public nothrow Zsnpi() : base(ZSNPI)
2499 {
2500 }
2501 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2502 {
2503 long yy = cast<long>(regs.Get(y));
2504 if (yy <= 0)
2505 {
2506 ulong zz = z;
2507 ulong xx = zz;
2508 regs.Set(x, xx);
2509 }
2510 else
2511 {
2512 ulong xx = 0u;
2513 regs.Set(x, xx);
2514 }
2515 }
2516 public override nothrow bool IsZReg() const
2517 {
2518 return false;
2519 }
2520 }
2521
2522 public class Zsev : Instruction
2523 {
2524 public nothrow Zsev() : base(ZSEV)
2525 {
2526 }
2527 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2528 {
2529 ulong yy = regs.Get(y);
2530 if ((yy & 0x1u) == 0u)
2531 {
2532 ulong zz = regs.Get(z);
2533 ulong xx = zz;
2534 regs.Set(x, xx);
2535 }
2536 else
2537 {
2538 ulong xx = 0u;
2539 regs.Set(x, xx);
2540 }
2541 }
2542 }
2543
2544 public class Zsevi : Instruction
2545 {
2546 public nothrow Zsevi() : base(ZSEVI)
2547 {
2548 }
2549 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2550 {
2551 ulong yy = regs.Get(y);
2552 if ((yy & 0x1u) == 0u)
2553 {
2554 ulong zz = z;
2555 ulong xx = zz;
2556 regs.Set(x, xx);
2557 }
2558 else
2559 {
2560 ulong xx = 0u;
2561 regs.Set(x, xx);
2562 }
2563 }
2564 public override nothrow bool IsZReg() const
2565 {
2566 return false;
2567 }
2568 }
2569
2570 public class And : Instruction
2571 {
2572 public nothrow And() : base(AND)
2573 {
2574 }
2575 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2576 {
2577 ulong yy = regs.Get(y);
2578 ulong zz = regs.Get(z);
2579 ulong xx = yy & zz;
2580 regs.Set(x, xx);
2581 }
2582 }
2583
2584 public class Andi : Instruction
2585 {
2586 public nothrow Andi() : base(ANDI)
2587 {
2588 }
2589 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2590 {
2591 ulong yy = regs.Get(y);
2592 ulong zz = z;
2593 ulong xx = yy & zz;
2594 regs.Set(x, xx);
2595 }
2596 public override nothrow bool IsZReg() const
2597 {
2598 return false;
2599 }
2600 }
2601
2602 public class Or : Instruction
2603 {
2604 public nothrow Or() : base(OR)
2605 {
2606 }
2607 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2608 {
2609 ulong yy = regs.Get(y);
2610 ulong zz = regs.Get(z);
2611 ulong xx = yy | zz;
2612 regs.Set(x, xx);
2613 }
2614 }
2615
2616 public class Ori : Instruction
2617 {
2618 public nothrow Ori() : base(ORI)
2619 {
2620 }
2621 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2622 {
2623 ulong yy = regs.Get(y);
2624 ulong zz = z;
2625 ulong xx = yy | zz;
2626 regs.Set(x, xx);
2627 }
2628 public override nothrow bool IsZReg() const
2629 {
2630 return false;
2631 }
2632 }
2633
2634 public class Xor : Instruction
2635 {
2636 public nothrow Xor() : base(XOR)
2637 {
2638 }
2639 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2640 {
2641 ulong yy = regs.Get(y);
2642 ulong zz = regs.Get(z);
2643 ulong xx = yy ^ zz;
2644 regs.Set(x, xx);
2645 }
2646 }
2647
2648 public class Xori : Instruction
2649 {
2650 public nothrow Xori() : base(XORI)
2651 {
2652 }
2653 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2654 {
2655 ulong yy = regs.Get(y);
2656 ulong zz = z;
2657 ulong xx = yy ^ zz;
2658 regs.Set(x, xx);
2659 }
2660 public override nothrow bool IsZReg() const
2661 {
2662 return false;
2663 }
2664 }
2665
2666 public class Andn : Instruction
2667 {
2668 public nothrow Andn() : base(ANDN)
2669 {
2670 }
2671 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2672 {
2673 ulong yy = regs.Get(y);
2674 ulong zz = regs.Get(z);
2675 ulong xx = yy & ~zz;
2676 regs.Set(x, xx);
2677 }
2678 }
2679
2680 public class Andni : Instruction
2681 {
2682 public nothrow Andni() : base(ANDNI)
2683 {
2684 }
2685 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2686 {
2687 ulong yy = regs.Get(y);
2688 ulong zz = z;
2689 ulong xx = yy & ~zz;
2690 regs.Set(x, xx);
2691 }
2692 public override nothrow bool IsZReg() const
2693 {
2694 return false;
2695 }
2696 }
2697
2698 public class Orn : Instruction
2699 {
2700 public nothrow Orn() : base(ORN)
2701 {
2702 }
2703 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2704 {
2705 ulong yy = regs.Get(y);
2706 ulong zz = regs.Get(z);
2707 ulong xx = yy | ~zz;
2708 regs.Set(x, xx);
2709 }
2710 }
2711
2712 public class Orni : Instruction
2713 {
2714 public nothrow Orni() : base(ORNI)
2715 {
2716 }
2717 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2718 {
2719 ulong yy = regs.Get(y);
2720 ulong zz = z;
2721 ulong xx = yy | ~zz;
2722 regs.Set(x, xx);
2723 }
2724 public override nothrow bool IsZReg() const
2725 {
2726 return false;
2727 }
2728 }
2729
2730 public class Nand : Instruction
2731 {
2732 public nothrow Nand() : base(NAND)
2733 {
2734 }
2735 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2736 {
2737 ulong yy = regs.Get(y);
2738 ulong zz = regs.Get(z);
2739 ulong xx = ~(yy & zz);
2740 regs.Set(x, xx);
2741 }
2742 }
2743
2744 public class Nandi : Instruction
2745 {
2746 public nothrow Nandi() : base(NANDI)
2747 {
2748 }
2749 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2750 {
2751 ulong yy = regs.Get(y);
2752 ulong zz = z;
2753 ulong xx = ~(yy & zz);
2754 regs.Set(x, xx);
2755 }
2756 public override nothrow bool IsZReg() const
2757 {
2758 return false;
2759 }
2760 }
2761
2762 public class Nor : Instruction
2763 {
2764 public nothrow Nor() : base(NOR)
2765 {
2766 }
2767 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2768 {
2769 ulong yy = regs.Get(y);
2770 ulong zz = regs.Get(z);
2771 ulong xx = ~(yy | zz);
2772 regs.Set(x, xx);
2773 }
2774 }
2775
2776 public class Nori : Instruction
2777 {
2778 public nothrow Nori() : base(NORI)
2779 {
2780 }
2781 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2782 {
2783 ulong yy = regs.Get(y);
2784 ulong zz = z;
2785 ulong xx = ~(yy | zz);
2786 regs.Set(x, xx);
2787 }
2788 public override nothrow bool IsZReg() const
2789 {
2790 return false;
2791 }
2792 }
2793
2794 public class Nxor : Instruction
2795 {
2796 public nothrow Nxor() : base(NXOR)
2797 {
2798 }
2799 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2800 {
2801 ulong yy = regs.Get(y);
2802 ulong zz = regs.Get(z);
2803 ulong xx = ~(yy ^ zz);
2804 regs.Set(x, xx);
2805 }
2806 }
2807
2808 public class Nxori : Instruction
2809 {
2810 public nothrow Nxori() : base(NXORI)
2811 {
2812 }
2813 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2814 {
2815 ulong yy = regs.Get(y);
2816 ulong zz = z;
2817 ulong xx = ~(yy ^ zz);
2818 regs.Set(x, xx);
2819 }
2820 public override nothrow bool IsZReg() const
2821 {
2822 return false;
2823 }
2824 }
2825
2826 public class Mux : Instruction
2827 {
2828 public nothrow Mux() : base(MUX)
2829 {
2830 }
2831 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2832 {
2833 ulong mm = regs.GetSpecial(Registers.rM);
2834 ulong yy = regs.Get(y);
2835 ulong zz = regs.Get(z);
2836 ulong xx = (yy & mm) | (zz & ~mm);
2837 regs.Set(x, xx);
2838 }
2839 }
2840
2841 public class Muxi : Instruction
2842 {
2843 public nothrow Muxi() : base(MUXI)
2844 {
2845 }
2846 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2847 {
2848 ulong mm = regs.GetSpecial(Registers.rM);
2849 ulong yy = regs.Get(y);
2850 ulong zz = z;
2851 ulong xx = (yy & mm) | (zz & ~mm);
2852 regs.Set(x, xx);
2853 }
2854 public override nothrow bool IsZReg() const
2855 {
2856 return false;
2857 }
2858 }
2859
2860 public class Sadd : Instruction
2861 {
2862 public nothrow Sadd() : base(SADD)
2863 {
2864 }
2865 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2866 {
2867 ulong yy = regs.Get(y);
2868 ulong zz = regs.Get(z);
2869 ulong xx = BitCount(yy & ~zz);
2870 regs.Set(x, xx);
2871 }
2872 }
2873
2874 public class Saddi : Instruction
2875 {
2876 public nothrow Saddi() : base(SADDI)
2877 {
2878 }
2879 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2880 {
2881 ulong yy = regs.Get(y);
2882 ulong zz = z;
2883 ulong xx = BitCount(yy & ~zz);
2884 regs.Set(x, xx);
2885 }
2886 public override nothrow bool IsZReg() const
2887 {
2888 return false;
2889 }
2890 }
2891
2892 public class Bdif : Instruction
2893 {
2894 public nothrow Bdif() : base(BDIF)
2895 {
2896 }
2897 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2898 {
2899 ulong yy = regs.Get(y);
2900 ulong zz = regs.Get(z);
2901 ulong xx = 00u;
2902 for (int i = 0; i < 8; ++i;)
2903 {
2904 byte yb = cast<byte>(yy);
2905 byte zb = cast<byte>(zz);
2906 byte xb = SaturatingSubtraction(yb, zb);
2907 xx = xx | (cast<ulong>(xb) << cast<ulong>(i << 3));
2908 yy = yy >> 8u;
2909 zz = zz >> 8u;
2910 }
2911 regs.Set(x, xx);
2912 }
2913 }
2914
2915 public class Bdifi : Instruction
2916 {
2917 public nothrow Bdifi() : base(BDIFI)
2918 {
2919 }
2920 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2921 {
2922 ulong yy = regs.Get(y);
2923 ulong zz = z;
2924 ulong xx = 00u;
2925 for (int i = 0; i < 8; ++i;)
2926 {
2927 byte yb = cast<byte>(yy);
2928 byte zb = cast<byte>(zz);
2929 byte xb = SaturatingSubtraction(yb, zb);
2930 xx = xx | (cast<ulong>(xb) << cast<ulong>(i << 3));
2931 yy = yy >> 8u;
2932 zz = zz >> 8u;
2933 }
2934 regs.Set(x, xx);
2935 }
2936 public override nothrow bool IsZReg() const
2937 {
2938 return false;
2939 }
2940 }
2941
2942 public class Wdif : Instruction
2943 {
2944 public nothrow Wdif() : base(WDIF)
2945 {
2946 }
2947 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2948 {
2949 ulong yy = regs.Get(y);
2950 ulong zz = regs.Get(z);
2951 ulong xx = 00u;
2952 for (int i = 0; i < 4; ++i;)
2953 {
2954 ushort yw = cast<ushort>(yy);
2955 ushort zw = cast<ushort>(zz);
2956 ushort xw = SaturatingSubtraction(yw, zw);
2957 xx = xx | (cast<ulong>(xw) << cast<ulong>(i << 4));
2958 yy = yy >> 16u;
2959 zz = zz >> 16u;
2960 }
2961 regs.Set(x, xx);
2962 }
2963 }
2964
2965 public class Wdifi : Instruction
2966 {
2967 public nothrow Wdifi() : base(WDIFI)
2968 {
2969 }
2970 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2971 {
2972 ulong yy = regs.Get(y);
2973 ulong zz = z;
2974 ulong xx = 00u;
2975 for (int i = 0; i < 4; ++i;)
2976 {
2977 ushort yw = cast<ushort>(yy);
2978 ushort zw = cast<ushort>(zz);
2979 ushort xw = SaturatingSubtraction(yw, zw);
2980 xx = xx | (cast<ulong>(xw) << cast<ulong>(i << 4));
2981 yy = yy >> 16u;
2982 zz = zz >> 16u;
2983 }
2984 regs.Set(x, xx);
2985 }
2986 public override nothrow bool IsZReg() const
2987 {
2988 return false;
2989 }
2990 }
2991
2992 public class Tdif : Instruction
2993 {
2994 public nothrow Tdif() : base(TDIF)
2995 {
2996 }
2997 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
2998 {
2999 ulong yy = regs.Get(y);
3000 ulong zz = regs.Get(z);
3001 ulong xx = 00u;
3002 for (int i = 0; i < 2; ++i;)
3003 {
3004 uint yi = cast<uint>(yy);
3005 uint zi = cast<uint>(zz);
3006 uint xi = SaturatingSubtraction(yi, zi);
3007 xx = xx | (cast<ulong>(xi) << cast<ulong>(i << 5));
3008 yy = yy >> 32u;
3009 zz = zz >> 32u;
3010 }
3011 regs.Set(x, xx);
3012 }
3013 }
3014
3015 public class Tdifi : Instruction
3016 {
3017 public nothrow Tdifi() : base(TDIFI)
3018 {
3019 }
3020 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3021 {
3022 ulong yy = regs.Get(y);
3023 ulong zz = z;
3024 ulong xx = 00u;
3025 for (int i = 0; i < 2; ++i;)
3026 {
3027 uint yi = cast<uint>(yy);
3028 uint zi = cast<uint>(zz);
3029 uint xi = SaturatingSubtraction(yi, zi);
3030 xx = xx | (cast<ulong>(xi) << cast<ulong>(i << 5));
3031 yy = yy >> 32u;
3032 zz = zz >> 32u;
3033 }
3034 regs.Set(x, xx);
3035 }
3036 public override nothrow bool IsZReg() const
3037 {
3038 return false;
3039 }
3040 }
3041
3042 public class Odif : Instruction
3043 {
3044 public nothrow Odif() : base(ODIF)
3045 {
3046 }
3047 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3048 {
3049 ulong yy = regs.Get(y);
3050 ulong zz = regs.Get(z);
3051 ulong xx = SaturatingSubtraction(yy, zz);
3052 regs.Set(x, xx);
3053 }
3054 }
3055
3056 public class Odifi : Instruction
3057 {
3058 public nothrow Odifi() : base(ODIFI)
3059 {
3060 }
3061 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3062 {
3063 ulong yy = regs.Get(y);
3064 ulong zz = regs.Get(z);
3065 ulong xx = SaturatingSubtraction(yy, zz);
3066 regs.Set(x, xx);
3067 }
3068 public override nothrow bool IsZReg() const
3069 {
3070 return false;
3071 }
3072 }
3073
3074 public class Fadd : Instruction
3075 {
3076 public nothrow Fadd() : base(FADD)
3077 {
3078 }
3079 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3080 {
3081 ulong yy = regs.Get(y);
3082 double yd = *cast<double*>(cast<void*>(&yy));
3083 ulong zz = regs.Get(z);
3084 double zd = *cast<double*>(cast<void*>(&zz));
3085 double xd = yd + zd;
3086 ulong xx = *cast<ulong*>(cast<void*>(&xd));
3087 regs.Set(x, xx);
3088 }
3089 }
3090
3091 public class Fsub : Instruction
3092 {
3093 public nothrow Fsub() : base(FSUB)
3094 {
3095 }
3096 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3097 {
3098 ulong yy = regs.Get(y);
3099 double yd = *cast<double*>(cast<void*>(&yy));
3100 ulong zz = regs.Get(z);
3101 double zd = *cast<double*>(cast<void*>(&zz));
3102 double xd = yd - zd;
3103 ulong xx = *cast<ulong*>(cast<void*>(&xd));
3104 regs.Set(x, xx);
3105 }
3106 }
3107
3108 public class Fmul : Instruction
3109 {
3110 public nothrow Fmul() : base(FMUL)
3111 {
3112 }
3113 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3114 {
3115 ulong yy = regs.Get(y);
3116 double yd = *cast<double*>(cast<void*>(&yy));
3117 ulong zz = regs.Get(z);
3118 double zd = *cast<double*>(cast<void*>(&zz));
3119 double xd = yd * zd;
3120 ulong xx = *cast<ulong*>(cast<void*>(&xd));
3121 regs.Set(x, xx);
3122 }
3123 }
3124
3125 public class Fdiv : Instruction
3126 {
3127 public nothrow Fdiv() : base(FDIV)
3128 {
3129 }
3130 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3131 {
3132 ulong yy = regs.Get(y);
3133 double yd = *cast<double*>(cast<void*>(&yy));
3134 ulong zz = regs.Get(z);
3135 double zd = *cast<double*>(cast<void*>(&zz));
3136 double xd = yd / zd;
3137 ulong xx = *cast<ulong*>(cast<void*>(&xd));
3138 regs.Set(x, xx);
3139 }
3140 }
3141
3142 public class Fint : Instruction
3143 {
3144 public nothrow Fint() : base(FINT)
3145 {
3146 }
3147 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3148 {
3149
3150 ulong zz = regs.Get(z);
3151 double zd = *cast<double*>(cast<void*>(&zz));
3152 ulong zi = cast<ulong>(zd);
3153 double xd = zi;
3154 ulong xx = *cast<ulong*>(cast<void*>(&xd));
3155 regs.Set(x, xx);
3156 }
3157 }
3158
3159 public class Fcmp : Instruction
3160 {
3161 public nothrow Fcmp() : base(FCMP)
3162 {
3163 }
3164 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3165 {
3166 ulong yy = regs.Get(y);
3167 double yd = *cast<double*>(cast<void*>(&yy));
3168 ulong zz = regs.Get(z);
3169 double zd = *cast<double*>(cast<void*>(&zz));
3170 long gr = cast<long>(yd > zd);
3171 long ls = cast<long>(yd < zd);
3172 long xx = gr - ls;
3173 regs.Set(x, cast<ulong>(xx));
3174 }
3175 }
3176
3177 public class Fix : Instruction
3178 {
3179 public nothrow Fix() : base(FIX)
3180 {
3181 }
3182 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3183 {
3184
3185 ulong zz = regs.Get(z);
3186 double zd = *cast<double*>(cast<void*>(&zz));
3187 long xx = cast<long>(zd);
3188 regs.Set(x, cast<ulong>(xx));
3189 }
3190 }
3191
3192 public class Fixu : Instruction
3193 {
3194 public nothrow Fixu() : base(FIXU)
3195 {
3196 }
3197 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3198 {
3199
3200 ulong zz = regs.Get(z);
3201 double zd = *cast<double*>(cast<void*>(&zz));
3202 ulong xx = cast<ulong>(zd);
3203 regs.Set(x, xx);
3204 }
3205 }
3206
3207 public class Flot : Instruction
3208 {
3209 public nothrow Flot() : base(FLOT)
3210 {
3211 }
3212 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3213 {
3214 long zz = cast<long>(regs.Get(z));
3215 double xd = zz;
3216 ulong xx = *cast<ulong*>(cast<void*>(&xd));
3217 regs.Set(x, xx);
3218 }
3219 }
3220
3221 public class SFlot : Instruction
3222 {
3223 public nothrow SFlot() : base(SFLOT)
3224 {
3225 }
3226 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3227 {
3228 long zz = cast<long>(regs.Get(z));
3229 float xd = cast<float>(zz);
3230 ulong xx = *cast<uint*>(cast<void*>(&xd));
3231 regs.Set(x, xx);
3232 }
3233 }
3234
3235 public class Floti : Instruction
3236 {
3237 public nothrow Floti() : base(FLOTI)
3238 {
3239 }
3240 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3241 {
3242 long zz = z;
3243 double xd = zz;
3244 ulong xx = *cast<ulong*>(cast<void*>(&xd));
3245 regs.Set(x, xx);
3246 }
3247 public override nothrow bool IsZReg() const
3248 {
3249 return false;
3250 }
3251 }
3252
3253 public class SFloti : Instruction
3254 {
3255 public nothrow SFloti() : base(SFLOTI)
3256 {
3257 }
3258 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3259 {
3260 long zz = z;
3261 float xd = cast<float>(zz);
3262 ulong xx = *cast<uint*>(cast<void*>(&xd));
3263 regs.Set(x, xx);
3264 }
3265 }
3266
3267 public class Flotu : Instruction
3268 {
3269 public nothrow Flotu() : base(FLOTU)
3270 {
3271 }
3272 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3273 {
3274 ulong zz = regs.Get(z);
3275 double xd = zz;
3276 ulong xx = *cast<ulong*>(cast<void*>(&xd));
3277 regs.Set(x, xx);
3278 }
3279 }
3280
3281 public class SFlotu : Instruction
3282 {
3283 public nothrow SFlotu() : base(SFLOTU)
3284 {
3285 }
3286 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3287 {
3288 ulong zz = cast<ulong>(regs.Get(z));
3289 float xd = cast<float>(zz);
3290 ulong xx = *cast<uint*>(cast<void*>(&xd));
3291 regs.Set(x, xx);
3292 }
3293 }
3294
3295 public class Flotui : Instruction
3296 {
3297 public nothrow Flotui() : base(FLOTUI)
3298 {
3299 }
3300 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3301 {
3302 ulong zz = z;
3303 double xd = zz;
3304 ulong xx = *cast<ulong*>(cast<void*>(&xd));
3305 regs.Set(x, xx);
3306 }
3307 public override nothrow bool IsZReg() const
3308 {
3309 return false;
3310 }
3311 }
3312
3313 public class SFlotui : Instruction
3314 {
3315 public nothrow SFlotui() : base(SFLOTUI)
3316 {
3317 }
3318 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3319 {
3320 ulong zz = z;
3321 float xd = cast<float>(zz);
3322 ulong xx = *cast<uint*>(cast<void*>(&xd));
3323 regs.Set(x, xx);
3324 }
3325 }
3326
3327 public class Seth : Instruction
3328 {
3329 public nothrow Seth() : base(SETH)
3330 {
3331 }
3332 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3333 {
3334 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3335 ulong xx = cast<ulong>(yz) << 48u;
3336 regs.Set(x, xx);
3337 }
3338 public override nothrow bool IsWydeImmediateInst() const
3339 {
3340 return true;
3341 }
3342 }
3343
3344 public class Setmh : Instruction
3345 {
3346 public nothrow Setmh() : base(SETMH)
3347 {
3348 }
3349 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3350 {
3351 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3352 ulong xx = cast<ulong>(yz) << 32u;
3353 regs.Set(x, xx);
3354 }
3355 public override nothrow bool IsWydeImmediateInst() const
3356 {
3357 return true;
3358 }
3359 }
3360
3361 public class Setml : Instruction
3362 {
3363 public nothrow Setml() : base(SETML)
3364 {
3365 }
3366 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3367 {
3368 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3369 ulong xx = cast<ulong>(yz) << 16u;
3370 regs.Set(x, xx);
3371 }
3372 public override nothrow bool IsWydeImmediateInst() const
3373 {
3374 return true;
3375 }
3376 }
3377
3378 public class Setl : Instruction
3379 {
3380 public nothrow Setl() : base(SETL)
3381 {
3382 }
3383 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3384 {
3385 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3386 ulong xx = yz;
3387 regs.Set(x, xx);
3388 }
3389 public override nothrow bool IsWydeImmediateInst() const
3390 {
3391 return true;
3392 }
3393 }
3394
3395 public class Inch : Instruction
3396 {
3397 public nothrow Inch() : base(INCH)
3398 {
3399 }
3400 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3401 {
3402 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3403 ulong xx = regs.Get(x) + (cast<ulong>(yz) << 48u);
3404 regs.Set(x, xx);
3405 }
3406 public override nothrow bool IsWydeImmediateInst() const
3407 {
3408 return true;
3409 }
3410 }
3411
3412 public class Incmh : Instruction
3413 {
3414 public nothrow Incmh() : base(INCMH)
3415 {
3416 }
3417 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3418 {
3419 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3420 ulong xx = regs.Get(x) + (cast<ulong>(yz) << 32u);
3421 regs.Set(x, xx);
3422 }
3423 public override nothrow bool IsWydeImmediateInst() const
3424 {
3425 return true;
3426 }
3427 }
3428
3429 public class Incml : Instruction
3430 {
3431 public nothrow Incml() : base(INCML)
3432 {
3433 }
3434 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3435 {
3436 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3437 ulong xx = regs.Get(x) + (cast<ulong>(yz) << 16u);
3438 regs.Set(x, xx);
3439 }
3440 public override nothrow bool IsWydeImmediateInst() const
3441 {
3442 return true;
3443 }
3444 }
3445
3446 public class Incl : Instruction
3447 {
3448 public nothrow Incl() : base(INCL)
3449 {
3450 }
3451 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3452 {
3453 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3454 ulong xx = regs.Get(x) + cast<ulong>(yz);
3455 regs.Set(x, xx);
3456 }
3457 public override nothrow bool IsWydeImmediateInst() const
3458 {
3459 return true;
3460 }
3461 }
3462
3463 public class Orh : Instruction
3464 {
3465 public nothrow Orh() : base(ORH)
3466 {
3467 }
3468 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3469 {
3470 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3471 ulong xx = regs.Get(x) | (cast<ulong>(yz) << 48u);
3472 regs.Set(x, xx);
3473 }
3474 public override nothrow bool IsWydeImmediateInst() const
3475 {
3476 return true;
3477 }
3478 }
3479
3480 public class Ormh : Instruction
3481 {
3482 public nothrow Ormh() : base(ORMH)
3483 {
3484 }
3485 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3486 {
3487 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3488 ulong xx = regs.Get(x) | (cast<ulong>(yz) << 32u);
3489 regs.Set(x, xx);
3490 }
3491 public override nothrow bool IsWydeImmediateInst() const
3492 {
3493 return true;
3494 }
3495 }
3496
3497 public class Orml : Instruction
3498 {
3499 public nothrow Orml() : base(ORML)
3500 {
3501 }
3502 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3503 {
3504 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3505 ulong xx = regs.Get(x) | (cast<ulong>(yz) << 16u);
3506 regs.Set(x, xx);
3507 }
3508 public override nothrow bool IsWydeImmediateInst() const
3509 {
3510 return true;
3511 }
3512 }
3513
3514 public class Orl : Instruction
3515 {
3516 public nothrow Orl() : base(ORL)
3517 {
3518 }
3519 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3520 {
3521 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3522 ulong xx = regs.Get(x) | cast<ulong>(yz);
3523 regs.Set(x, xx);
3524 }
3525 public override nothrow bool IsWydeImmediateInst() const
3526 {
3527 return true;
3528 }
3529 }
3530
3531 public class Andnh : Instruction
3532 {
3533 public nothrow Andnh() : base(ANDNH)
3534 {
3535 }
3536 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3537 {
3538 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3539 ulong xx = regs.Get(x) & ~(cast<ulong>(yz) << 48u);
3540 regs.Set(x, xx);
3541 }
3542 public override nothrow bool IsWydeImmediateInst() const
3543 {
3544 return true;
3545 }
3546 }
3547
3548 public class Andnmh : Instruction
3549 {
3550 public nothrow Andnmh() : base(ANDNMH)
3551 {
3552 }
3553 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3554 {
3555 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3556 ulong xx = regs.Get(x) & ~(cast<ulong>(yz) << 32u);
3557 regs.Set(x, xx);
3558 }
3559 public override nothrow bool IsWydeImmediateInst() const
3560 {
3561 return true;
3562 }
3563 }
3564
3565 public class Andnml : Instruction
3566 {
3567 public nothrow Andnml() : base(ANDNML)
3568 {
3569 }
3570 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3571 {
3572 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3573 ulong xx = regs.Get(x) & ~(cast<ulong>(yz) << 16u);
3574 regs.Set(x, xx);
3575 }
3576 public override nothrow bool IsWydeImmediateInst() const
3577 {
3578 return true;
3579 }
3580 }
3581
3582 public class Andnl : Instruction
3583 {
3584 public nothrow Andnl() : base(ANDNL)
3585 {
3586 }
3587 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3588 {
3589 ushort yz = (cast<ushort>(y) << 8u) | cast<ushort>(z);
3590 ulong xx = regs.Get(x) & ~cast<ulong>(yz);
3591 regs.Set(x, xx);
3592 }
3593 public override nothrow bool IsWydeImmediateInst() const
3594 {
3595 return true;
3596 }
3597 }
3598
3599 public class Jmp : Instruction
3600 {
3601 public nothrow Jmp() : base(JMP)
3602 {
3603 }
3604 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3605 {
3606 ulong pc = regs.GetPC();
3607 ulong to = pc + (((cast<ulong>(x) << 16u) | (cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
3608 regs.SetPC(to);
3609 }
3610 public override string FormatParams(ulong address, byte x, byte y, byte z, Formatter& formatter)
3611 {
3612 string result = formatter.FormatLongOffset(address, x, y, z, true);
3613 return result;
3614 }
3615 public override nothrow bool IsJumpInst() const
3616 {
3617 return true;
3618 }
3619 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
3620 {
3621 ulong to = pc + (((cast<ulong>(x) << 16u) | (cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
3622 return List<ulong>(1, to);
3623 }
3624 }
3625
3626 public class Jmpb : Instruction
3627 {
3628 public nothrow Jmpb() : base(JMPB)
3629 {
3630 }
3631 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3632 {
3633 ulong pc = regs.GetPC();
3634 ulong offset = ((cast<ulong>(x) << 16u) | (cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
3635 ulong to = pc - offset;
3636 regs.SetPC(to);
3637 }
3638 public override string FormatParams(ulong address, byte x, byte y, byte z, Formatter& formatter)
3639 {
3640 string result = formatter.FormatLongOffset(address, x, y, z, false);
3641 return result;
3642 }
3643 public override nothrow bool IsJumpInst() const
3644 {
3645 return true;
3646 }
3647 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
3648 {
3649 ulong offset = ((cast<ulong>(x) << 16u) | (cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
3650 ulong to = pc - offset;
3651 return List<ulong>(1, to);
3652 }
3653 }
3654
3655 public class Go : Instruction
3656 {
3657 public nothrow Go() : base(GO)
3658 {
3659 }
3660 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3661 {
3662 ulong yy = regs.Get(y);
3663 ulong zz = regs.Get(z);
3664 ulong to = yy + zz;
3665 ulong pc = regs.GetPC();
3666 ulong xx = pc + 4u;
3667 regs.SetPC(to);
3668 regs.Set(x, xx);
3669 }
3670 public override nothrow bool IsJumpInst() const
3671 {
3672 return true;
3673 }
3674 public override nothrow bool IsGoInst() const
3675 {
3676 return true;
3677 }
3678 public override nothrow bool IsAbsoluteAddressInst()
3679 {
3680 return true;
3681 }
3682 }
3683
3684 public class Goi : Instruction
3685 {
3686 public nothrow Goi() : base(GOI)
3687 {
3688 }
3689 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3690 {
3691 ulong yy = regs.Get(y);
3692 ulong zz = z;
3693 ulong to = yy + zz;
3694 ulong pc = regs.GetPC();
3695 ulong xx = pc + 4u;
3696 regs.SetPC(to);
3697 regs.Set(x, xx);
3698 }
3699 public override nothrow bool IsJumpInst() const
3700 {
3701 return true;
3702 }
3703 public override nothrow bool IsGoInst() const
3704 {
3705 return true;
3706 }
3707 public override nothrow bool IsZReg() const
3708 {
3709 return false;
3710 }
3711 public override nothrow bool IsAbsoluteAddressInst()
3712 {
3713 return true;
3714 }
3715 }
3716
3717 public class Call : Instruction
3718 {
3719 public nothrow Call() : base(CALL)
3720 {
3721 }
3722 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3723 {
3724 ulong yy = regs.Get(y);
3725 ulong zz = regs.Get(z);
3726 ulong to = yy + zz;
3727 ulong pc = regs.GetPC();
3728 ulong ret = pc + 4u;
3729 ulong sp = regs.GetSpecial(regSP);
3730 for (byte i = 0u; i <= x; ++i;)
3731 {
3732 mem.WriteULong(sp, regs.Get(i), Protection.write);
3733 sp = sp + 8u;
3734 }
3735 mem.WriteULong(sp, x, Protection.write);
3736 sp = sp + 8u;
3737 mem.WriteULong(sp, regs.GetSpecial(Registers.rL), Protection.write);
3738 sp = sp + 8u;
3739 mem.WriteULong(sp, ret, Protection.write);
3740 sp = sp + 8u;
3741 regs.Set(regSP, sp);
3742 regs.SetPC(to);
3743 regs.SetSpecial(Registers.rL, 0u);
3744 }
3745 public override nothrow bool IsJumpInst() const
3746 {
3747 return true;
3748 }
3749 public override nothrow bool IsGoInst() const
3750 {
3751 return true;
3752 }
3753 public override nothrow bool IsAbsoluteAddressInst()
3754 {
3755 return true;
3756 }
3757 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
3758 {
3759 ulong yy = regs.Get(y);
3760 ulong zz = regs.Get(z);
3761 ulong to = yy + zz;
3762 return List<ulong>(1, to);
3763 }
3764 }
3765
3766 public class Calli : Instruction
3767 {
3768 public nothrow Calli() : base(CALLI)
3769 {
3770 }
3771 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3772 {
3773 ulong yy = regs.Get(y);
3774 ulong zz = z;
3775 ulong to = yy + zz;
3776 ulong pc = regs.GetPC();
3777 ulong ret = pc + 4u;
3778 ulong sp = regs.Get(regSP);
3779 for (byte i = 0u; i <= x; ++i;)
3780 {
3781 mem.WriteULong(sp, regs.Get(i), Protection.write);
3782 sp = sp + 8u;
3783 }
3784 mem.WriteULong(sp, x, Protection.write);
3785 sp = sp + 8u;
3786 mem.WriteULong(sp, regs.GetSpecial(Registers.rL), Protection.write);
3787 sp = sp + 8u;
3788 mem.WriteULong(sp, ret, Protection.write);
3789 sp = sp + 8u;
3790 regs.Set(regSP, sp);
3791 regs.SetPC(to);
3792 regs.SetSpecial(Registers.rL, 0u);
3793 }
3794 public override nothrow bool IsJumpInst() const
3795 {
3796 return true;
3797 }
3798 public override nothrow bool IsGoInst() const
3799 {
3800 return true;
3801 }
3802 public override nothrow bool IsZReg() const
3803 {
3804 return false;
3805 }
3806 public override nothrow bool IsAbsoluteAddressInst()
3807 {
3808 return true;
3809 }
3810 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
3811 {
3812 ulong yy = regs.Get(y);
3813 ulong zz = z;
3814 ulong to = yy + zz;
3815 return List<ulong>(1, to);
3816 }
3817 }
3818
3819 public class Ret : Instruction
3820 {
3821 public nothrow Ret() : base(RET)
3822 {
3823 }
3824 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3825 {
3826 ulong sp = regs.Get(regSP);
3827 sp = sp - 8u;
3828 ulong ret = mem.ReadULong(sp, Protection.read);
3829 sp = sp - 8u;
3830 ulong rl = mem.ReadULong(sp, Protection.read);
3831 regs.SetSpecial(Registers.rL, rl);
3832 sp = sp - 8u;
3833 byte n = cast<byte>(mem.ReadULong(sp, Protection.read));
3834 for (int i = n; i >= 0; --i;)
3835 {
3836 sp = sp - 8u;
3837 ulong rr = mem.ReadULong(sp, Protection.read);
3838 regs.Set(cast<byte>(i), rr);
3839 }
3840 regs.Set(regSP, sp);
3841 regs.SetPC(ret);
3842 }
3843 public override string FormatParams(ulong address, byte x, byte y, byte z, Formatter& formatter)
3844 {
3845 return string();
3846 }
3847 public override nothrow bool IsJumpInst() const
3848 {
3849 return true;
3850 }
3851 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
3852 {
3853 ulong sp = regs.Get(regSP);
3854 sp = sp - 8u;
3855 ulong ret = mem.ReadULong(sp, Protection.read);
3856 return List<ulong>(1, ret);
3857 }
3858 }
3859
3860 public class Bn : Instruction
3861 {
3862 public nothrow Bn() : base(BN)
3863 {
3864 }
3865 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3866 {
3867 long xx = cast<long>(regs.Get(x));
3868 if (xx < 0)
3869 {
3870 ulong pc = regs.GetPC();
3871 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
3872 regs.SetPC(to);
3873 }
3874 else
3875 {
3876 ulong pc = regs.GetPC();
3877 ulong to = pc + 4u;
3878 regs.SetPC(to);
3879 }
3880 }
3881 public override nothrow bool IsJumpInst() const
3882 {
3883 return true;
3884 }
3885 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
3886 {
3887 List<ulong> addresses;
3888 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
3889 addresses.Add(to);
3890 addresses.Add(pc + 4u);
3891 return addresses;
3892 }
3893 }
3894
3895 public class Bnb : Instruction
3896 {
3897 public nothrow Bnb() : base(BNB)
3898 {
3899 }
3900 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3901 {
3902 long xx = cast<long>(regs.Get(x));
3903 if (xx < 0)
3904 {
3905 ulong pc = regs.GetPC();
3906 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
3907 ulong to = pc - offset;
3908 regs.SetPC(to);
3909 }
3910 else
3911 {
3912 ulong pc = regs.GetPC();
3913 ulong to = pc + 4u;
3914 regs.SetPC(to);
3915 }
3916 }
3917 public override nothrow bool IsJumpInst() const
3918 {
3919 return true;
3920 }
3921 public override nothrow bool IsForwardInst() const
3922 {
3923 return false;
3924 }
3925 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
3926 {
3927 List<ulong> addresses;
3928 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
3929 ulong to = pc - offset;
3930 addresses.Add(to);
3931 addresses.Add(pc + 4u);
3932 return addresses;
3933 }
3934 }
3935
3936 public class Bz : Instruction
3937 {
3938 public nothrow Bz() : base(BZ)
3939 {
3940 }
3941 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3942 {
3943 ulong xx = regs.Get(x);
3944 if (xx == 0u)
3945 {
3946 ulong pc = regs.GetPC();
3947 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
3948 regs.SetPC(to);
3949 }
3950 else
3951 {
3952 ulong pc = regs.GetPC();
3953 ulong to = pc + 4u;
3954 regs.SetPC(to);
3955 }
3956 }
3957 public override nothrow bool IsJumpInst() const
3958 {
3959 return true;
3960 }
3961 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
3962 {
3963 List<ulong> addresses;
3964 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
3965 addresses.Add(to);
3966 addresses.Add(pc + 4u);
3967 return addresses;
3968 }
3969 }
3970
3971 public class Bzb : Instruction
3972 {
3973 public nothrow Bzb() : base(BZB)
3974 {
3975 }
3976 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
3977 {
3978 ulong xx = regs.Get(x);
3979 if (xx == 0u)
3980 {
3981 ulong pc = regs.GetPC();
3982 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
3983 ulong to = pc - offset;
3984 regs.SetPC(to);
3985 }
3986 else
3987 {
3988 ulong pc = regs.GetPC();
3989 ulong to = pc + 4u;
3990 regs.SetPC(to);
3991 }
3992 }
3993 public override nothrow bool IsJumpInst() const
3994 {
3995 return true;
3996 }
3997 public override nothrow bool IsForwardInst() const
3998 {
3999 return false;
4000 }
4001 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4002 {
4003 List<ulong> addresses;
4004 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4005 ulong to = pc - offset;
4006 addresses.Add(to);
4007 addresses.Add(pc + 4u);
4008 return addresses;
4009 }
4010 }
4011
4012 public class Bp : Instruction
4013 {
4014 public nothrow Bp() : base(BP)
4015 {
4016 }
4017 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4018 {
4019 long xx = cast<long>(regs.Get(x));
4020 if (xx > 0)
4021 {
4022 ulong pc = regs.GetPC();
4023 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4024 regs.SetPC(to);
4025 }
4026 else
4027 {
4028 ulong pc = regs.GetPC();
4029 ulong to = pc + 4u;
4030 regs.SetPC(to);
4031 }
4032 }
4033 public override nothrow bool IsJumpInst() const
4034 {
4035 return true;
4036 }
4037 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4038 {
4039 List<ulong> addresses;
4040 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4041 addresses.Add(to);
4042 addresses.Add(pc + 4u);
4043 return addresses;
4044 }
4045 }
4046
4047 public class Bpb : Instruction
4048 {
4049 public nothrow Bpb() : base(BPB)
4050 {
4051 }
4052 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4053 {
4054 long xx = cast<long>(regs.Get(x));
4055 if (xx > 0)
4056 {
4057 ulong pc = regs.GetPC();
4058 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4059 ulong to = pc - offset;
4060 regs.SetPC(to);
4061 }
4062 else
4063 {
4064 ulong pc = regs.GetPC();
4065 ulong to = pc + 4u;
4066 regs.SetPC(to);
4067 }
4068 }
4069 public override nothrow bool IsJumpInst() const
4070 {
4071 return true;
4072 }
4073 public override nothrow bool IsForwardInst() const
4074 {
4075 return false;
4076 }
4077 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4078 {
4079 List<ulong> addresses;
4080 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4081 ulong to = pc - offset;
4082 addresses.Add(to);
4083 addresses.Add(pc + 4u);
4084 return addresses;
4085 }
4086 }
4087
4088 public class Bod : Instruction
4089 {
4090 public nothrow Bod() : base(BOD)
4091 {
4092 }
4093 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4094 {
4095 ulong xx = regs.Get(x);
4096 if ((xx & 1u) != 0u)
4097 {
4098 ulong pc = regs.GetPC();
4099 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4100 regs.SetPC(to);
4101 }
4102 else
4103 {
4104 ulong pc = regs.GetPC();
4105 ulong to = pc + 4u;
4106 regs.SetPC(to);
4107 }
4108 }
4109 public override nothrow bool IsJumpInst() const
4110 {
4111 return true;
4112 }
4113 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4114 {
4115 List<ulong> addresses;
4116 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4117 addresses.Add(to);
4118 addresses.Add(pc + 4u);
4119 return addresses;
4120 }
4121 }
4122
4123 public class Bodb : Instruction
4124 {
4125 public nothrow Bodb() : base(BODB)
4126 {
4127 }
4128 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4129 {
4130 ulong xx = regs.Get(x);
4131 if ((xx & 1u) != 0u)
4132 {
4133 ulong pc = regs.GetPC();
4134 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4135 ulong to = pc - offset;
4136 regs.SetPC(to);
4137 }
4138 else
4139 {
4140 ulong pc = regs.GetPC();
4141 ulong to = pc + 4u;
4142 regs.SetPC(to);
4143 }
4144 }
4145 public override nothrow bool IsJumpInst() const
4146 {
4147 return true;
4148 }
4149 public override nothrow bool IsForwardInst() const
4150 {
4151 return false;
4152 }
4153 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4154 {
4155 List<ulong> addresses;
4156 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4157 ulong to = pc - offset;
4158 addresses.Add(to);
4159 addresses.Add(pc + 4u);
4160 return addresses;
4161 }
4162 }
4163
4164 public class Bnn : Instruction
4165 {
4166 public nothrow Bnn() : base(BNN)
4167 {
4168 }
4169 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4170 {
4171 long xx = cast<long>(regs.Get(x));
4172 if (xx >= 0)
4173 {
4174 ulong pc = regs.GetPC();
4175 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4176 regs.SetPC(to);
4177 }
4178 else
4179 {
4180 ulong pc = regs.GetPC();
4181 ulong to = pc + 4u;
4182 regs.SetPC(to);
4183 }
4184 }
4185 public override nothrow bool IsJumpInst() const
4186 {
4187 return true;
4188 }
4189 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4190 {
4191 List<ulong> addresses;
4192 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4193 addresses.Add(to);
4194 addresses.Add(pc + 4u);
4195 return addresses;
4196 }
4197 }
4198
4199 public class Bnnb : Instruction
4200 {
4201 public nothrow Bnnb() : base(BNNB)
4202 {
4203 }
4204 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4205 {
4206 long xx = cast<long>(regs.Get(x));
4207 if (xx >= 0)
4208 {
4209 ulong pc = regs.GetPC();
4210 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4211 ulong to = pc - offset;
4212 regs.SetPC(to);
4213 }
4214 else
4215 {
4216 ulong pc = regs.GetPC();
4217 ulong to = pc + 4u;
4218 regs.SetPC(to);
4219 }
4220 }
4221 public override nothrow bool IsJumpInst() const
4222 {
4223 return true;
4224 }
4225 public override nothrow bool IsForwardInst() const
4226 {
4227 return false;
4228 }
4229 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4230 {
4231 List<ulong> addresses;
4232 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4233 ulong to = pc - offset;
4234 addresses.Add(to);
4235 addresses.Add(pc + 4u);
4236 return addresses;
4237 }
4238 }
4239
4240 public class Bnz : Instruction
4241 {
4242 public nothrow Bnz() : base(BNZ)
4243 {
4244 }
4245 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4246 {
4247 ulong xx = regs.Get(x);
4248 if (xx != 0u)
4249 {
4250 ulong pc = regs.GetPC();
4251 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4252 regs.SetPC(to);
4253 }
4254 else
4255 {
4256 ulong pc = regs.GetPC();
4257 ulong to = pc + 4u;
4258 regs.SetPC(to);
4259 }
4260 }
4261 public override nothrow bool IsJumpInst() const
4262 {
4263 return true;
4264 }
4265 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4266 {
4267 List<ulong> addresses;
4268 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4269 addresses.Add(to);
4270 addresses.Add(pc + 4u);
4271 return addresses;
4272 }
4273 }
4274
4275 public class Bnzb : Instruction
4276 {
4277 public nothrow Bnzb() : base(BNZB)
4278 {
4279 }
4280 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4281 {
4282 ulong xx = regs.Get(x);
4283 if (xx != 0u)
4284 {
4285 ulong pc = regs.GetPC();
4286 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4287 ulong to = pc - offset;
4288 regs.SetPC(to);
4289 }
4290 else
4291 {
4292 ulong pc = regs.GetPC();
4293 ulong to = pc + 4u;
4294 regs.SetPC(to);
4295 }
4296 }
4297 public override nothrow bool IsJumpInst() const
4298 {
4299 return true;
4300 }
4301 public override nothrow bool IsForwardInst() const
4302 {
4303 return false;
4304 }
4305 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4306 {
4307 List<ulong> addresses;
4308 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4309 ulong to = pc - offset;
4310 addresses.Add(to);
4311 addresses.Add(pc + 4u);
4312 return addresses;
4313 }
4314 }
4315
4316 public class Bnp : Instruction
4317 {
4318 public nothrow Bnp() : base(BNP)
4319 {
4320 }
4321 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4322 {
4323 long xx = cast<long>(regs.Get(x));
4324 if (xx <= 0)
4325 {
4326 ulong pc = regs.GetPC();
4327 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4328 regs.SetPC(to);
4329 }
4330 else
4331 {
4332 ulong pc = regs.GetPC();
4333 ulong to = pc + 4u;
4334 regs.SetPC(to);
4335 }
4336 }
4337 public override nothrow bool IsJumpInst() const
4338 {
4339 return true;
4340 }
4341 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4342 {
4343 List<ulong> addresses;
4344 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4345 addresses.Add(to);
4346 addresses.Add(pc + 4u);
4347 return addresses;
4348 }
4349 }
4350
4351 public class Bnpb : Instruction
4352 {
4353 public nothrow Bnpb() : base(BNPB)
4354 {
4355 }
4356 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4357 {
4358 long xx = cast<long>(regs.Get(x));
4359 if (xx <= 0)
4360 {
4361 ulong pc = regs.GetPC();
4362 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4363 ulong to = pc - offset;
4364 regs.SetPC(to);
4365 }
4366 else
4367 {
4368 ulong pc = regs.GetPC();
4369 ulong to = pc + 4u;
4370 regs.SetPC(to);
4371 }
4372 }
4373 public override nothrow bool IsJumpInst() const
4374 {
4375 return true;
4376 }
4377 public override nothrow bool IsForwardInst() const
4378 {
4379 return false;
4380 }
4381 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4382 {
4383 List<ulong> addresses;
4384 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4385 ulong to = pc - offset;
4386 addresses.Add(to);
4387 addresses.Add(pc + 4u);
4388 return addresses;
4389 }
4390 }
4391
4392 public class Bev : Instruction
4393 {
4394 public nothrow Bev() : base(BEV)
4395 {
4396 }
4397 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4398 {
4399 ulong xx = regs.Get(x);
4400 if ((xx & 1u) == 0u)
4401 {
4402 ulong pc = regs.GetPC();
4403 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4404 regs.SetPC(to);
4405 }
4406 else
4407 {
4408 ulong pc = regs.GetPC();
4409 ulong to = pc + 4u;
4410 regs.SetPC(to);
4411 }
4412 }
4413 public override nothrow bool IsJumpInst() const
4414 {
4415 return true;
4416 }
4417 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4418 {
4419 List<ulong> addresses;
4420 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4421 addresses.Add(to);
4422 addresses.Add(pc + 4u);
4423 return addresses;
4424 }
4425 }
4426
4427 public class Bevb : Instruction
4428 {
4429 public nothrow Bevb() : base(BEVB)
4430 {
4431 }
4432 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4433 {
4434 ulong xx = regs.Get(x);
4435 if ((xx & 1u) == 0u)
4436 {
4437 ulong pc = regs.GetPC();
4438 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4439 ulong to = pc - offset;
4440 regs.SetPC(to);
4441 }
4442 else
4443 {
4444 ulong pc = regs.GetPC();
4445 ulong to = pc + 4u;
4446 regs.SetPC(to);
4447 }
4448 }
4449 public override nothrow bool IsJumpInst() const
4450 {
4451 return true;
4452 }
4453 public override nothrow bool IsForwardInst() const
4454 {
4455 return false;
4456 }
4457 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4458 {
4459 List<ulong> addresses;
4460 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4461 ulong to = pc - offset;
4462 addresses.Add(to);
4463 addresses.Add(pc + 4u);
4464 return addresses;
4465 }
4466 }
4467
4468 public class Pbn : Instruction
4469 {
4470 public nothrow Pbn() : base(PBN)
4471 {
4472 }
4473 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4474 {
4475 long xx = cast<long>(regs.Get(x));
4476 if (xx < 0)
4477 {
4478 ulong pc = regs.GetPC();
4479 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4480 regs.SetPC(to);
4481 }
4482 else
4483 {
4484 ulong pc = regs.GetPC();
4485 ulong to = pc + 4u;
4486 regs.SetPC(to);
4487 }
4488 }
4489 public override nothrow bool IsJumpInst() const
4490 {
4491 return true;
4492 }
4493 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4494 {
4495 List<ulong> addresses;
4496 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4497 addresses.Add(to);
4498 addresses.Add(pc + 4u);
4499 return addresses;
4500 }
4501 }
4502
4503 public class Pbnb : Instruction
4504 {
4505 public nothrow Pbnb() : base(PBNB)
4506 {
4507 }
4508 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4509 {
4510 long xx = cast<long>(regs.Get(x));
4511 if (xx < 0)
4512 {
4513 ulong pc = regs.GetPC();
4514 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4515 ulong to = pc - offset;
4516 regs.SetPC(to);
4517 }
4518 else
4519 {
4520 ulong pc = regs.GetPC();
4521 ulong to = pc + 4u;
4522 regs.SetPC(to);
4523 }
4524 }
4525 public override nothrow bool IsJumpInst() const
4526 {
4527 return true;
4528 }
4529 public override nothrow bool IsForwardInst() const
4530 {
4531 return false;
4532 }
4533 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4534 {
4535 List<ulong> addresses;
4536 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4537 ulong to = pc - offset;
4538 addresses.Add(to);
4539 addresses.Add(pc + 4u);
4540 return addresses;
4541 }
4542 }
4543
4544 public class Pbz : Instruction
4545 {
4546 public nothrow Pbz() : base(PBZ)
4547 {
4548 }
4549 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4550 {
4551 ulong xx = regs.Get(x);
4552 if (xx == 0u)
4553 {
4554 ulong pc = regs.GetPC();
4555 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4556 regs.SetPC(to);
4557 }
4558 else
4559 {
4560 ulong pc = regs.GetPC();
4561 ulong to = pc + 4u;
4562 regs.SetPC(to);
4563 }
4564 }
4565 public override nothrow bool IsJumpInst() const
4566 {
4567 return true;
4568 }
4569 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4570 {
4571 List<ulong> addresses;
4572 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4573 addresses.Add(to);
4574 addresses.Add(pc + 4u);
4575 return addresses;
4576 }
4577 }
4578
4579 public class Pbzb : Instruction
4580 {
4581 public nothrow Pbzb() : base(PBZB)
4582 {
4583 }
4584 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4585 {
4586 ulong xx = regs.Get(x);
4587 if (xx == 0u)
4588 {
4589 ulong pc = regs.GetPC();
4590 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4591 ulong to = pc - offset;
4592 regs.SetPC(to);
4593 }
4594 else
4595 {
4596 ulong pc = regs.GetPC();
4597 ulong to = pc + 4u;
4598 regs.SetPC(to);
4599 }
4600 }
4601 public override nothrow bool IsJumpInst() const
4602 {
4603 return true;
4604 }
4605 public override nothrow bool IsForwardInst() const
4606 {
4607 return false;
4608 }
4609 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4610 {
4611 List<ulong> addresses;
4612 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4613 ulong to = pc - offset;
4614 addresses.Add(to);
4615 addresses.Add(pc + 4u);
4616 return addresses;
4617 }
4618 }
4619
4620 public class Pbp : Instruction
4621 {
4622 public nothrow Pbp() : base(PBP)
4623 {
4624 }
4625 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4626 {
4627 long xx = cast<long>(regs.Get(x));
4628 if (xx > 0)
4629 {
4630 ulong pc = regs.GetPC();
4631 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4632 regs.SetPC(to);
4633 }
4634 else
4635 {
4636 ulong pc = regs.GetPC();
4637 ulong to = pc + 4u;
4638 regs.SetPC(to);
4639 }
4640 }
4641 public override nothrow bool IsJumpInst() const
4642 {
4643 return true;
4644 }
4645 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4646 {
4647 List<ulong> addresses;
4648 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4649 addresses.Add(to);
4650 addresses.Add(pc + 4u);
4651 return addresses;
4652 }
4653 }
4654
4655 public class Pbpb : Instruction
4656 {
4657 public nothrow Pbpb() : base(PBPB)
4658 {
4659 }
4660 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4661 {
4662 long xx = cast<long>(regs.Get(x));
4663 if (xx > 0)
4664 {
4665 ulong pc = regs.GetPC();
4666 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4667 ulong to = pc - offset;
4668 regs.SetPC(to);
4669 }
4670 else
4671 {
4672 ulong pc = regs.GetPC();
4673 ulong to = pc + 4u;
4674 regs.SetPC(to);
4675 }
4676 }
4677 public override nothrow bool IsJumpInst() const
4678 {
4679 return true;
4680 }
4681 public override nothrow bool IsForwardInst() const
4682 {
4683 return false;
4684 }
4685 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4686 {
4687 List<ulong> addresses;
4688 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4689 ulong to = pc - offset;
4690 addresses.Add(to);
4691 addresses.Add(pc + 4u);
4692 return addresses;
4693 }
4694 }
4695
4696 public class Pbod : Instruction
4697 {
4698 public nothrow Pbod() : base(PBOD)
4699 {
4700 }
4701 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4702 {
4703 ulong xx = regs.Get(x);
4704 if ((xx & 1u) != 0u)
4705 {
4706 ulong pc = regs.GetPC();
4707 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4708 regs.SetPC(to);
4709 }
4710 else
4711 {
4712 ulong pc = regs.GetPC();
4713 ulong to = pc + 4u;
4714 regs.SetPC(to);
4715 }
4716 }
4717 public override nothrow bool IsJumpInst() const
4718 {
4719 return true;
4720 }
4721 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4722 {
4723 List<ulong> addresses;
4724 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4725 addresses.Add(to);
4726 addresses.Add(pc + 4u);
4727 return addresses;
4728 }
4729 }
4730
4731 public class Pbodb : Instruction
4732 {
4733 public nothrow Pbodb() : base(PBODB)
4734 {
4735 }
4736 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4737 {
4738 ulong xx = regs.Get(x);
4739 if ((xx & 1u) != 0u)
4740 {
4741 ulong pc = regs.GetPC();
4742 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4743 ulong to = pc - offset;
4744 regs.SetPC(to);
4745 }
4746 else
4747 {
4748 ulong pc = regs.GetPC();
4749 ulong to = pc + 4u;
4750 regs.SetPC(to);
4751 }
4752 }
4753 public override nothrow bool IsJumpInst() const
4754 {
4755 return true;
4756 }
4757 public override nothrow bool IsForwardInst() const
4758 {
4759 return false;
4760 }
4761 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4762 {
4763 List<ulong> addresses;
4764 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4765 ulong to = pc - offset;
4766 addresses.Add(to);
4767 addresses.Add(pc + 4u);
4768 return addresses;
4769 }
4770 }
4771
4772 public class Pbnn : Instruction
4773 {
4774 public nothrow Pbnn() : base(PBNN)
4775 {
4776 }
4777 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4778 {
4779 long xx = cast<long>(regs.Get(x));
4780 if (xx >= 0)
4781 {
4782 ulong pc = regs.GetPC();
4783 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4784 regs.SetPC(to);
4785 }
4786 else
4787 {
4788 ulong pc = regs.GetPC();
4789 ulong to = pc + 4u;
4790 regs.SetPC(to);
4791 }
4792 }
4793 public override nothrow bool IsJumpInst() const
4794 {
4795 return true;
4796 }
4797 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4798 {
4799 List<ulong> addresses;
4800 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4801 addresses.Add(to);
4802 addresses.Add(pc + 4u);
4803 return addresses;
4804 }
4805 }
4806
4807 public class Pbnnb : Instruction
4808 {
4809 public nothrow Pbnnb() : base(PBNNB)
4810 {
4811 }
4812 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4813 {
4814 long xx = cast<long>(regs.Get(x));
4815 if (xx >= 0)
4816 {
4817 ulong pc = regs.GetPC();
4818 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4819 ulong to = pc - offset;
4820 regs.SetPC(to);
4821 }
4822 else
4823 {
4824 ulong pc = regs.GetPC();
4825 ulong to = pc + 4u;
4826 regs.SetPC(to);
4827 }
4828 }
4829 public override nothrow bool IsJumpInst() const
4830 {
4831 return true;
4832 }
4833 public override nothrow bool IsForwardInst() const
4834 {
4835 return false;
4836 }
4837 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4838 {
4839 List<ulong> addresses;
4840 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4841 ulong to = pc - offset;
4842 addresses.Add(to);
4843 addresses.Add(pc + 4u);
4844 return addresses;
4845 }
4846 }
4847
4848 public class Pbnz : Instruction
4849 {
4850 public nothrow Pbnz() : base(PBNZ)
4851 {
4852 }
4853 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4854 {
4855 ulong xx = regs.Get(x);
4856 if (xx != 0u)
4857 {
4858 ulong pc = regs.GetPC();
4859 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4860 regs.SetPC(to);
4861 }
4862 else
4863 {
4864 ulong pc = regs.GetPC();
4865 ulong to = pc + 4u;
4866 regs.SetPC(to);
4867 }
4868 }
4869 public override nothrow bool IsJumpInst() const
4870 {
4871 return true;
4872 }
4873 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4874 {
4875 List<ulong> addresses;
4876 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4877 addresses.Add(to);
4878 addresses.Add(pc + 4u);
4879 return addresses;
4880 }
4881 }
4882
4883 public class Pbnzb : Instruction
4884 {
4885 public nothrow Pbnzb() : base(PBNZB)
4886 {
4887 }
4888 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4889 {
4890 ulong xx = regs.Get(x);
4891 if (xx != 0u)
4892 {
4893 ulong pc = regs.GetPC();
4894 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4895 ulong to = pc - offset;
4896 regs.SetPC(to);
4897 }
4898 else
4899 {
4900 ulong pc = regs.GetPC();
4901 ulong to = pc + 4u;
4902 regs.SetPC(to);
4903 }
4904 }
4905 public override nothrow bool IsJumpInst() const
4906 {
4907 return true;
4908 }
4909 public override nothrow bool IsForwardInst() const
4910 {
4911 return false;
4912 }
4913 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4914 {
4915 List<ulong> addresses;
4916 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4917 ulong to = pc - offset;
4918 addresses.Add(to);
4919 addresses.Add(pc + 4u);
4920 return addresses;
4921 }
4922 }
4923
4924 public class Pbnp : Instruction
4925 {
4926 public nothrow Pbnp() : base(PBNP)
4927 {
4928 }
4929 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4930 {
4931 long xx = cast<long>(regs.Get(x));
4932 if (xx <= 0)
4933 {
4934 ulong pc = regs.GetPC();
4935 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4936 regs.SetPC(to);
4937 }
4938 else
4939 {
4940 ulong pc = regs.GetPC();
4941 ulong to = pc + 4u;
4942 regs.SetPC(to);
4943 }
4944 }
4945 public override nothrow bool IsJumpInst() const
4946 {
4947 return true;
4948 }
4949 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4950 {
4951 List<ulong> addresses;
4952 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
4953 addresses.Add(to);
4954 addresses.Add(pc + 4u);
4955 return addresses;
4956 }
4957 }
4958
4959 public class Pbnpb : Instruction
4960 {
4961 public nothrow Pbnpb() : base(PBNPB)
4962 {
4963 }
4964 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
4965 {
4966 long xx = cast<long>(regs.Get(x));
4967 if (xx <= 0)
4968 {
4969 ulong pc = regs.GetPC();
4970 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4971 ulong to = pc - offset;
4972 regs.SetPC(to);
4973 }
4974 else
4975 {
4976 ulong pc = regs.GetPC();
4977 ulong to = pc + 4u;
4978 regs.SetPC(to);
4979 }
4980 }
4981 public override nothrow bool IsJumpInst() const
4982 {
4983 return true;
4984 }
4985 public override nothrow bool IsForwardInst() const
4986 {
4987 return false;
4988 }
4989 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
4990 {
4991 List<ulong> addresses;
4992 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
4993 ulong to = pc - offset;
4994 addresses.Add(to);
4995 addresses.Add(pc + 4u);
4996 return addresses;
4997 }
4998 }
4999
5000 public class Pbev : Instruction
5001 {
5002 public nothrow Pbev() : base(PBEV)
5003 {
5004 }
5005 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
5006 {
5007 ulong xx = regs.Get(x);
5008 if ((xx & 1u) == 0u)
5009 {
5010 ulong pc = regs.GetPC();
5011 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
5012 regs.SetPC(to);
5013 }
5014 else
5015 {
5016 ulong pc = regs.GetPC();
5017 ulong to = pc + 4u;
5018 regs.SetPC(to);
5019 }
5020 }
5021 public override nothrow bool IsJumpInst() const
5022 {
5023 return true;
5024 }
5025 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
5026 {
5027 List<ulong> addresses;
5028 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
5029 addresses.Add(to);
5030 addresses.Add(pc + 4u);
5031 return addresses;
5032 }
5033 }
5034
5035 public class Pbevb : Instruction
5036 {
5037 public nothrow Pbevb() : base(PBEVB)
5038 {
5039 }
5040 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
5041 {
5042 ulong xx = regs.Get(x);
5043 if ((xx & 1u) == 0u)
5044 {
5045 ulong pc = regs.GetPC();
5046 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
5047 ulong to = pc - offset;
5048 regs.SetPC(to);
5049 }
5050 else
5051 {
5052 ulong pc = regs.GetPC();
5053 ulong to = pc + 4u;
5054 regs.SetPC(to);
5055 }
5056 }
5057 public override nothrow bool IsJumpInst() const
5058 {
5059 return true;
5060 }
5061 public override nothrow bool IsForwardInst() const
5062 {
5063 return false;
5064 }
5065 public override nothrow List<ulong> GetTargetAddresses(ulong pc, Registers& regs, Memory& mem, byte x, byte y, byte z)
5066 {
5067 List<ulong> addresses;
5068 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
5069 ulong to = pc - offset;
5070 addresses.Add(to);
5071 addresses.Add(pc + 4u);
5072 return addresses;
5073 }
5074 }
5075
5076 public class Get : Instruction
5077 {
5078 public nothrow Get() : base(GET)
5079 {
5080 }
5081 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
5082 {
5083 ulong xx = regs.GetSpecial(y);
5084 regs.Set(x, xx);
5085 }
5086 public override string FormatParams(ulong address, byte x, byte y, byte z, Formatter& formatter)
5087 {
5088 string result;
5089 result.Append(formatter.FormatRegisterNumber(x));
5090 result.Append(',');
5091 cmsx.machine.Machine& machine = Machine.Instance();
5092 cmsx.machine.Registers& regs = machine.GetRegisters();
5093 string regName = regs.GetSpecialRegName(y);
5094 if (!regName.IsEmpty())
5095 {
5096 result.Append(regName);
5097 }
5098 else
5099 {
5100 result.Append(ToString(y));
5101 }
5102 return result;
5103 }
5104 }
5105
5106 public class Put : Instruction
5107 {
5108 public nothrow Put() : base(PUT)
5109 {
5110 }
5111 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
5112 {
5113 ulong yy = regs.Get(y);
5114 regs.SetSpecial(x, yy);
5115 }
5116 public override string FormatParams(ulong address, byte x, byte y, byte z, Formatter& formatter)
5117 {
5118 string result;
5119 cmsx.machine.Machine& machine = Machine.Instance();
5120 cmsx.machine.Registers& regs = machine.GetRegisters();
5121 string regName = regs.GetSpecialRegName(x);
5122 if (!regName.IsEmpty())
5123 {
5124 result.Append(regName);
5125 }
5126 else
5127 {
5128 result.Append(ToString(x));
5129 }
5130 result.Append(',');
5131 result.Append(formatter.FormatRegisterNumber(y));
5132 return result;
5133 }
5134 }
5135
5136 public class GetA : Instruction
5137 {
5138 public nothrow GetA() : base(GETA)
5139 {
5140 }
5141 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
5142 {
5143 ulong pc = regs.GetPC();
5144 ulong to = pc + (((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u);
5145 ulong xx = to;
5146 regs.Set(x, xx);
5147 }
5148 }
5149
5150 public class GetAb : Instruction
5151 {
5152 public nothrow GetAb() : base(GETAB)
5153 {
5154 }
5155 public override void Execute(Registers& regs, Memory& mem, byte x, byte y, byte z)
5156 {
5157 ulong pc = regs.GetPC();
5158 ulong offset = ((cast<ulong>(y) << 8u) | cast<ulong>(z)) << 2u;
5159 ulong to = pc - offset;
5160 ulong xx = to;
5161 regs.Set(x, xx);
5162 }
5163 public override nothrow bool IsForwardInst() const
5164 {
5165 return false;
5166 }
5167 }
5168
5169 public string FormatInstruction(ulong address, byte opCode, byte x, byte y, byte z, Formatter& formatter)
5170 {
5171 Instruction* inst = Machine.Instance().GetInst(opCode);
5172 if (inst != null)
5173 {
5174 return inst->Format(address, x, y, z, formatter);
5175 }
5176 else
5177 {
5178 string result = GetOpCodeName(opCode) + " instruction not implemented";
5179 return result;
5180 }
5181 }
5182 }