System X Virtual Machine Instruction Set Reference

The instruction set of the System X virtual machine is based on Donald Knuth's imaginary MMIX computer architecture. The instructions are interpreted and executed by the System X virtual machine written in C++.

MMIX instructions operate with different kinds of values:

• A byte is an 8-bit value
• A wyde is a 16-bit value
• A tetra is a 32-bit value
• An octa is a 64-bit value

Notation:

• $X denotes a register number X where X can be a byte 0...255.
• RA denotes a relative address 4 * (256 * Y + Z), where Y and Z are operands of an instruction
• LRA denotes a long relative address 4 * (256 * 256 * X + 256 * Y + Z), where X, Y and Z are operands of an instruction
• @ (at) denotes the location of the current instruction

Instruction Formats

MMIX instructions have four bytes:

1. the first byte is an operation code 0...255 denoted as OP
2. the second byte is the X operand of the instruction
3. the third byte is the Y operand of the instruction
4. the fourth byte is the Z operand of the instruction

The instructions have the following formats:

1. OP $X, $Y, $Z

$X, $Y and $Z are register operands. For example LDO $X, $Y, $Z instruction loads an octabyte value from address $Y + $Z and sets it as the value of register $X.

2. OP $X, $Y, Z

$X and $Y are register operands, and Z is an immediate byte operand. For example LDOI $X, $Y, Z instruction loads an octabyte value from memory address $Y + Z and sets it as the value of register $X.

3. OP X, Y, Z

X, Y and Z byte operands. For example TRAP X, Y, Z instruction calls operating system trap number X, Y, Z where X, Y and Z are interpreted as immediate bytes. Currently in System X bytes X and Z are zeros and Y is the number of virtual operating system function called.

4. OP $X, $Z

$X and $Z are register operands. For example FIX $X, $Z instruction converts value of register $Z interpreted as a double to an integer octabyte value and places it as the value of register $X.

5. OP $X, Z

$X is a register operand and Z is immediate byte operand. For example FLOTI $X, Z instruction converts a integer byte Z to a floating-point number and sets it as the value of register $X.

6. OP $X, Y, $Z

$X is a register operand, Y is an immediate byte operand, and $Z is a register operand. For example NEG $X, Y, $Z instruction subtracts the value of register $Z from immediate byte Y and sets is as the value of register $X.

7. OP $X, Y, Z

$X is a register operand, and Y and Z are an immediate byte operands. For example NEGI $X, Y, Z instruction subtracts immediate byte Z from immediate byte Y and sets is as the value of register $X.

8. OP $X, RA

$X is a register operand, and RA = 4 * (256 * Y + Z) is a relative address. For example BN $X, RA instruction branches to an instruction whose address is RA bytes ahead of the current instruction position if the value of register $X is negative.

9. OP X, $Y, $Z

X is immediate byte operand, $Y and $Z are register operands. For example the STCO X, $Y, $Z instruction stores a constant byte value X to a memory address $Y + $Z, where $Y and $Z are values of registers $Y and $Z respectively.

10. OP X, $Y, Z

X and Z are immediate byte operands, and $Y is a register operand For example the STCOI X, $Y, Z instruction stores a constant byte value X to a memoy address $Y + Z, where $Y is the value of register $Y and Z is an immediate byte value.

11. OP $X, YZ

$X is a register operand and YZ is interpreted as the wyde value 256 * Y + Z. For example the SETH $X, YZ instruction sets the value YZ as the high wyde value of register $X.

12. OP LRA

Operands X, Y and Z are interpreted as a long relative address LRA = 4 * (256 * 256 * X + 256 * Y + Z). For example the JMP LRA instruction jumps to an instruction whose address is LRA bytes ahead a of the current instruction position.

13. OP X, $Z

X is an immediate byte operand and $Z is a register operand. For example the PUT X, $Z instruction puts the value of register $Z as the value of the special registers number X.

14. OP X, Z

X and Z are immediate byte operands. For example PUTI X, Z instruction puts the value Z as the value of the special register number X.

15. OP

Instruction OP has no operands. For example the SWYM instruction is a no-operation regardless of the operands X, Y, and Z.

Changes to the MMIX instruction set.

Instructions CALL, CALLI and RET have changed semantics with respect to the original PUSHGO, PUSHGOI and POP instructions of MMIX so they have been renamed.

CALL Instruction

The CALL instruction has format 9: CALL X, $Y, $Z. It

• pushes the values of local register numbers 0...X - 1 to the stack
• pushes the value X interpreted as an octabyte to the stack
• pushes the value of special register rL to the stack
• pushes the return address @+4 to the stack
• zeros the value of the special register rL
• transfers control to the memory address $Y + $Z

CALLI Instruction

The CALLI instruction has format 10: CALLI X, $Y, Z. It operates the same way as the CALL instruction except it treats the Z as an immediate byte, so it transfers control to memory address $Y + Z.

RET Instruction

The RET instruction has format 15: RET. It

• pops the return addresss from the stack
• pops and sets the value of the special register rL from the stack
• pops the number of local registers X pushed from the stack
• pops and sets the values of the local registers 0...X - 1 from the stack
• transfers control to the return address

Registers

MMIX has 256 global registers of which the first 32 are special and have special names. The values of the special registers can be set using the PUT instruction and read using the GET instruction.

MMIX has 256 local registers numbered $0, $1, ..., $255.

Used Special Registers

• The special register rD, dividend register, is used in the implementation of the DIVU and DIVUI instructions.
• The special register rG, global threshold register, has value 248.
• The special register rH, himult register, is used in the implementation of the MULU and MULUI instructions.
• The special register rL, local threshold register, keeps track of the number of used local registers.
• The special registers rQ and rK, interrupt request register and interrupt mask register, is used in the implementation of the virtual machine interrupts.
• The special register rR, remainder register, is used in the implementation of the DIV and DIVI, DIVU and DIVUI instructions.
• The special register rV, virtual translation register, identifies the process owning a memory page when the virtual machine memory unit calculates a memory page address. It runs from 0 onwards.

Extensions to the MMIX Register Set

Global register:

• $255 is named ax
• $254 is named bx
• $253 is named cx
• $252 is named dx
• $251 is named ex
• $250 is named sp
• $249 is named fp
• $248 is named ix

Register usage:

• Registers ax, bx, cx and dx are used for passing arguments to virtual machine traps. Register ax is used for holding trap return value.
• The values of the registers ax, bx, cx, dx, ex and ix are not saved across function calls. They are used as scratch registers in the implementation of the System X intermediate language instructions.
• The register sp is used as a stack pointer.
• The register fp is used as a frame pointer.

The number of local registers used in the intermediate language implementation can be configured in the sx.machine.config.xml file that is located in the cmajor/config subdirectory. The default number of local registers used is numLocalRegs=8.

Instruction Set

implementation status: Y = implemented, N = not implemented, C = semantics changed